Hi Prabhakar,
On Fri, Jun 4, 2021 at 12:18 AM Lad Prabhakar
<prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> wrote:
> Add initial DTSI for RZ/G2{L,LC} SoC's.
>
> File structure:
> r9a07g044.dtsi => RZ/G2L family SoC common parts
> r9a07g044l1.dtsi => Specific to RZ/G2L (R9A07G044L single cortex A55) SoC
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
Thanks for your patch!
> ---
> arch/arm64/boot/dts/renesas/r9a07g044.dtsi | 119 +++++++++++++++++++
> arch/arm64/boot/dts/renesas/r9a07g044l1.dtsi | 25 ++++
> 2 files changed, 144 insertions(+)
> create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044.dtsi
> create mode 100644 arch/arm64/boot/dts/renesas/r9a07g044l1.dtsi
Don't you still want an r9a07g044l2.dtsi, for symmetry, and to add the
"renesas,r9a07g044l2" root compatible value?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
