Hi Prabhakar,
On Fri, May 21, 2021 at 7:21 PM Lad, Prabhakar
<prabhakar.csengg@xxxxxxxxx> wrote:
> On Fri, May 21, 2021 at 2:25 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> > On Fri, May 14, 2021 at 9:23 PM Lad Prabhakar
> > <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> wrote:
> > > Add ARCH_R9A07G044{L,LC} as a configuration symbol for the new Renesas
> > > RZ/G2{L,LC} SoC's.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > > Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> >
> > Thanks for your patch!
> >
> > > --- a/drivers/soc/renesas/Kconfig
> > > +++ b/drivers/soc/renesas/Kconfig
> > > @@ -279,6 +279,16 @@ config ARCH_R8A774B1
> > > help
> > > This enables support for the Renesas RZ/G2N SoC.
> > >
> > > +config ARCH_R9A07G044L
> > > + bool "ARM64 Platform support for RZ/G2L SoC"
> >
> > Please drop the "SoC", for consistency with other entries.
> >
> Oops will do that.
>
> > > + help
> > > + This enables support for the Renesas RZ/G2L SoC.
> > > +
> > > +config ARCH_R9A07G044LC
> > > + bool "ARM64 Platform support for RZ/G2LC SoC"
> >
> > Likewise.
> >
> will do.
>
> > > + help
> > > + This enables support for the Renesas RZ/G2LC SoC.
> > > +
> > > endif # ARM64
> >
> > Given LSI DEVID is the same, do we need both, or can we do with a
> > single ARCH_R9A07G044?
> >
> The reason behind adding separate configs was in case if we wanted to
> just build an image for RZ/G2L and not RZ/G2LC this would increase
> image size and also build unneeded dtb's.
How would it increase image size? I understand clock and pin control
are the same blocks.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
