Hi Prabhakar,
On Fri, May 21, 2021 at 3:26 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> On Fri, May 14, 2021 at 9:23 PM Lad Prabhakar
> <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> wrote:
> > Document R9A07G044 SoC variants, common compatiable string
> > "renesas,scif-r9a07g044" is added for RZ/G2L and RZ/G2LC SoC.
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
>
> Thanks for your patch!
>
> > --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml
> > @@ -64,6 +64,10 @@ properties:
> > - const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2
> > - const: renesas,scif # generic SCIF compatible UART
> >
> > + - items:
> > + - enum:
> > + - renesas,scif-r9a07g044 # RZ/G2{L,LC}
> > +
> > reg:
> > maxItems: 1
>
> Looks good to me.
>
> Do interrupts and interrupt-names need to be updated?
> The SCIF node added in "[PATCH 15/16] arm64: dts: renesas: Add initial
> DTSI for RZ/G2{L,LC} SoC's" has 5 interrupts, while the bindings
> support only 1, 4, or 6 interrupts.
According to the SoC interrupt mapping, "tei" and "dri" share an
interrupt, so 6 interrupts is correct, and this part of the binding
does not need an update.
Reviewed-by: Geert Uytterhoeven <geert+renesas@xxxxxxxxx>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
