On Mon, Mar 8, 2021 at 2:56 PM Arnd Bergmann <arnd@xxxxxxxxxx> wrote: > > On Mon, Mar 8, 2021 at 10:14 PM Rob Herring <robh@xxxxxxxxxx> wrote: > > On Mon, Mar 08, 2021 at 09:29:54PM +0100, Arnd Bergmann wrote: > > > On Mon, Mar 8, 2021 at 4:56 PM Rob Herring <robh@xxxxxxxxxx> wrote: > > > > Let's just stick with 'nonposted-mmio', but drop 'posted-mmio'. I'd > > rather know if and when we need 'posted-mmio'. It does need to be added > > to the DT spec[1] and schema[2] though (GH PRs are fine for both). > > I think the reason for having "posted-mmio" is that you cannot properly > define the PCI host controller nodes on the M1 without that: Since > nonposted-mmio applies to all child nodes, this would mean the PCI > memory space gets declared as nonposted by the DT, but the hardware > requires it to be mapped as posted. I don't think so. PCI devices wouldn't use any of the code paths in this patch. They would map their memory space with plain ioremap() which is posted. Rob
