The control register is a writeonly register that's why reading it doesn't make any sense. Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xxxxxxxxxx> --- drivers/tty/serial/uartlite.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c index 92dd528..52c223f 100644 --- a/drivers/tty/serial/uartlite.c +++ b/drivers/tty/serial/uartlite.c @@ -296,7 +296,6 @@ static void ulite_shutdown(struct uart_port *port) struct uartlite_data *pdata = port->private_data; uart_out32(0, ULITE_CONTROL, port); - uart_in32(ULITE_CONTROL, port); /* dummy */ free_irq(port->irq, port); clk_disable(pdata->clk); } @@ -367,7 +366,6 @@ static int ulite_request_port(struct uart_port *port) } pdata->reg_ops = &uartlite_be; - ret = uart_in32(ULITE_CONTROL, port); uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port); ret = uart_in32(ULITE_STATUS, port); /* Endianess detection */ -- 2.1.1
