Hello,
On Wed, 28 Oct 2020 17:20:24 +0100
Jan Kundrát <jan.kundrat@xxxxxxxxx> wrote:
> Thanks for taking the time to write this patch. We're using MAX14830 on a
> Clearfog Base board via a 26 MHz SPI bus. Our code polls a custom
> peripheral over UART at 115200 baud ten times a second; the messages are
> typically shorter than 50 chars. Before this patch, `perf top --sort
> comm,dso` showed about 28% CPU load for the corresponding SPI kthread,
> after applying this patch it's between 3 and 5%. That's cool :).
>
> Tested-by: Jan Kundrát <jan.kundrat@xxxxxxxxx>
> Reviewed-by: Jan Kundrát <jan.kundrat@xxxxxxxxx>
>
> (but see below, please)
Thanks for your review and testing, and glad to hear that it also
improves the CPU load on your use-case.
> > + /* Enable LSR, RX FIFO trigger, CTS change interrupts */
> > + val = MAX310X_IRQ_LSR_BIT | MAX310X_IRQ_RXFIFO_BIT |
> > MAX310X_IRQ_TXEMPTY_BIT;
> > max310x_port_write(port, MAX310X_IRQEN_REG, val | MAX310X_IRQ_CTS_BIT);
>
> This comment doesn't fully match that code, and also the effective value
> that is written to the register is split into two statements. What about
> just:
>
> + /* Enable LSR, RX FIFO trigger, TX FIFO empty, CTS change interrupts */
> + max310x_port_write(port, MAX310X_IRQEN_REG, MAX310X_IRQ_LSR_BIT |
> MAX310X_IRQ_RXFIFO_BIT | MAX310X_IRQ_TXEMPTY_BIT | MAX310X_IRQ_CTS_BIT);
Indeed, the comment should be updated, I'll fix that. Regarding the
effective value computed in two steps, it was already the case in the
current code:
/* Enable RX, TX, CTS change interrupts */
val = MAX310X_IRQ_RXEMPTY_BIT | MAX310X_IRQ_TXEMPTY_BIT;
max310x_port_write(port, MAX310X_IRQEN_REG, val | MAX310X_IRQ_CTS_BIT);
but granted, that's not an excuse not to fix it.
On my way to send a v3 :-)
Thanks again,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
