Re: [PATCH] tty: serial: fsl_lpuart: LS1021A has a FIFO size of 32 datawords

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On Thu, Oct 22, 2020 at 06:12:50PM +0300, Vladimir Oltean wrote:
> From: Vladimir Oltean <vladimir.oltean@xxxxxxx>
> 
> Similar to the workaround applied by Michael Walle in commit
> c2f448cff22a ("tty: serial: fsl_lpuart: add LS1028A support"), it turns
> out that the LPUARTx_FIFO encoding for fields TXFIFOSIZE and RXFIFOSIZE
> is the same for LS1028A as for LS1021A.
> 
> The RXFIFOSIZE in the Layerscape SoCs is fixed at this value:
> 101 Receive FIFO/Buffer depth = 32 datawords.
> 
> When Andy Duan wrote the commit in Fixes: below, he assumed that the 101
> encoding means 64 datawords. But this is not true for Layerscape. So
> that commit broke LS1021A, and this patch is extending the workaround
> for LS1028A which appeared in the meantime, to fix that breakage.
> 
> When the driver thinks that it has a deeper FIFO than it really has,
> getty (user space) output gets truncated.
> 
> Many thanks to Michael for suggesting this!
> 
> Fixes: f77ebb241ce0 ("tty: serial: fsl_lpuart: correct the FIFO depth size")
> Suggested-by: Michael Walle <michael@xxxxxxxx>
> Signed-off-by: Vladimir Oltean <vladimir.oltean@xxxxxxx>
> ---

Please don't merge this yet. The patch works, but the commit message is
a mess. Right now I suspect there might be some issues in the documentation.
I'll return with a v2 when I get that clarified.



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