[PATCH] serial: exar: Fix GPIO configuration for Sealevel cards based on XR17V35X

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From: Matthew Howell <matthew.howell@xxxxxxxxxxxx>

FIXES: 7dea8165f1d("serial: exar: Preconfigure xr17v35x MPIOs as output")

Sealevel XR17V35X based devices became inoperable on kernel versions above
4.11 due to the GPIO preconfiguration change introduced in commit
7dea8165f1d. This patch fixes this by preconfiguring the GPIO on Sealevel
cards to the value (0x00) used prior to commit 7dea8165f1d

Signed-off-by: Matthew Howell <matthew.howell@xxxxxxxxxxxx>
---

With GPIOs preconfigured as per commit 7dea8165f1d all ports on Sealevel
XR17V35X based devices become stuck in high impedance mode, regardless of
dip-switch or software configuration. This causes the device to become
effectively unusable. This patch (in various forms) has been distributed
to our customers and no issues related to it have been reported.

This is the first patch I have submitted so please let me know if anything
is incorrect, unclear, or if any changes to the patch are needed and I will
be happy to fix it.

--- linux/drivers/tty/serial/8250/8250_exar.c.orig    2020-07-09 11:05:03.920060577 -0400
+++ linux/drivers/tty/serial/8250/8250_exar.c    2020-07-09 11:05:25.275891627 -0400
@@ -326,7 +326,7 @@ static void setup_gpio(struct pci_dev *p
      * devices will export them as GPIOs, so we pre-configure them safely
      * as inputs.
      */
-    u8 dir = pcidev->vendor == PCI_VENDOR_ID_EXAR ? 0xff : 0x00;
+    u8 dir = (pcidev->vendor == PCI_VENDOR_ID_EXAR && pcidev->subsystem_vendor != PCI_VENDOR_ID_SEALEVEL) ? 0xff : 0x00;

     writeb(0x00, p + UART_EXAR_MPIOINT_7_0);
     writeb(0x00, p + UART_EXAR_MPIOLVL_7_0);

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