On Thu, Apr 02, 2020 at 7:48:38PM +0900, Krzysztof Kozlowski
> On Fri, Apr 03, 2020 at 07:20:41PM +0900, Hyunki Koo wrote:
> > Support 32-bit access for the TX/RX hold registers UTXH and URXH.
> >
> > This is required for some newer SoCs.
> >
> > Signed-off-by: Hyunki Koo <hyunki00.koo@xxxxxxxxxxx>
> > ---
> > v3: change rd_regl to rd_reg in line 954 for backward compatibility.
>
> I cannot find this change against v2.
Okay, I will add all changes.
>
> > ---
> >
> > drivers/tty/serial/samsung_tty.c | 76
> > +++++++++++++++++++++++++++++++++-------
> > 1 file changed, 64 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/tty/serial/samsung_tty.c
> > b/drivers/tty/serial/samsung_tty.c
> > index 73f951d65b93..a674a80163ed 100644
> > --- a/drivers/tty/serial/samsung_tty.c
> > +++ b/drivers/tty/serial/samsung_tty.c
> > @@ -154,12 +154,47 @@ struct s3c24xx_uart_port { #define
> > portaddrl(port, reg) \
> > ((unsigned long *)(unsigned long)((port)->membase + (reg)))
> >
> > -#define rd_regb(port, reg) (readb_relaxed(portaddr(port, reg)))
> > +static unsigned int rd_reg(struct uart_port *port, int reg)
>
> You should return here u32 to be consistent with readl_relaxed.
>
> > +{
> > + switch (port->iotype) {
> > + case UPIO_MEM:
> > + return readb_relaxed(portaddr(port, reg));
> > + case UPIO_MEM32:
> > + return readl_relaxed(portaddr(port, reg));
> > + default:
> > + return 0;
> > + }
> > + return 0;
> > +}
> > +
> > #define rd_regl(port, reg) (readl_relaxed(portaddr(port, reg)))
> >
> > -#define wr_regb(port, reg, val) writeb_relaxed(val, portaddr(port,
> > reg))
> > +static void wr_reg(struct uart_port *port, int reg, int val)
>
> val should be u32.
Okay, I will apply it.
>
> > +{
> > + switch (port->iotype) {
> > + case UPIO_MEM:
> > + writeb_relaxed(val, portaddr(port, reg));
> > + break;
> > + case UPIO_MEM32:
> > + writel_relaxed(val, portaddr(port, reg));
> > + break;
> > + }
> > +}
> > +
> > #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port,
> > reg))
> >
> > +static void write_buf(struct uart_port *port, int reg, int val)
>
> buf is misleading, you do not write here any buffer. Maybe
> "wr_reg_barrier()" or "wr_reg_order()"?
Okay, wr_reg_barrier would be good, I will apply it.
>
> Best regards,
> Krzysztof
