On Tue Jan 28, 2020 at 3:19 PM, Lukas Wunner wrote: > On Tue, Jan 28, 2020 at 01:42:21PM +0100, Nicolas Saenz Julienne wrote: > > I'm testing this by booting directly from RPi4's bootloader. And it > > works as long as I add this to config.txt: > > > > enable_uart=1 > > gpu_freq=500 > > > > Which AFAIK blocks frequency scalin on the GPU and fixes the clock to a > > point where the serial is set at 115200 bauds. > > > > Ideally it'd be nice to be able to query the clock frequency, and > > recalculate the divisors based on that. But I don't know if it's > > feasible at that point in the boot process. > > Well, we don't even support adjusting the baudrate *after* the kernel > has booted. Don't 8250 uarts have a clk divisor? I've seen other 8250 earlycon drivers do this (see 8250_ingenic.c), that said I think it's a lost cause for us. BTW did you had the oportunity to have a go at the patch? > The problem is that in mainline, bcm2835_defconfig contains: > CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE=y > > Likewise in the Foundation's downstream tree, bcmrpi_defconfig as well > as bcm2711_defconfig and bcm2709_defconfig contain: > CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE=y > > In contrast to this, we set the following on Revolution Pi devices: > CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y > > Downclocking influences not only the uart1 baud rate but also the > spi0 clock. We attach Ethernet chips to spi0, throughput was > significantly worse with the ondemand governor (which is what we > used previously). We felt that maximum Ethernet performance > outweighs the relatively small powersaving gains. In that regard I suggest you use the upstream cpufreq driver which behaves properly in that regard. It disables GPU freq scaling, so as to change CPU frequencies without SPI/I2C/UART issues. Regards, Nicolas
