On Sat, Aug 11, 2018 at 03:24:14PM -0400, Mark Hounschell wrote: > My application no longer writes correctly its first write to a dumb terminal > connected to /dev/ttyS0. This commit seems to be the culprit. I _think_ but > am not positive only the very first write is affected. It's as though the TX FIFO > is being reset during that write. What should be displayed is: > > PSW 80000000 INST 00000000 HALT > // > > What is displayed is some variation of: > > T 00000000 HAL// > > Reverting this commit fixes my problem. I know this was a long time ago. > I only noticed it a few months back but thought the issue was something > else and just ignored the problem. I can't any longer. > > markh@harley:/usr/src/linux> git bisect good > ecb988a3b7985913d1f0112f66667cdd15e40711 is the first bad commit > commit ecb988a3b7985913d1f0112f66667cdd15e40711 > Author: Steve Shih <sshih@xxxxxxxxx> > Date: Mon Oct 17 09:51:05 2016 -0700 > > tty: serial: 8250: 8250_core: NXP SC16C2552 workaround > > NXP SC16C2552 requires that we always write a reset to the RX FIFO and > TX FIFO whenever we enable the FIFOs > > Cc: xe-kernel@xxxxxxxxxxxxxxxxxx > Signed-off-by: Steve Shih <sshih@xxxxxxxxx> > Signed-off-by: David Singleton <davsingl@xxxxxxxxx> > Signed-off-by: Greg Kroah-Hartman <gregkh@xxxxxxxxxxxxxxxxxxx> > > :040000 040000 f772eff552ae81cc516a6c790b7b9c3da0adcab4 108e4a5cbfe32236f1cc108a6af4f495a03b32a3 M drivers > > Regards > Mark Thanks for reporting this. Can you send in a patch that reverts this so I can give you the credit for finding and fixing this? thanks, greg k-h > > > >
