Hi Uwe, On 24 May 2017 20:39, Uwe Kleine-König wrote: > Subject: [PATCH] serial: imx: ensure UCR3 and UFCR are setup correctly > > Commit e61c38d85b73 ("serial: imx: setup DCEDTE early and ensure DCD and > RI irqs to be off") has a flaw: While UCR3 and UFCR were modified using > read-modify-write before it switched to write register values > independent of the previous state. That's a good idea in principle (and > that's why I did it) but needs more care. > > This patch reinstates read-modify-write for UFCR and for UCR3 ensures > that RXDMUXSEL and ADNIMP are set for post imx1. > > Fixes: e61c38d85b73 ("serial: imx: setup DCEDTE early and ensure DCD and RI > irqs to be off") > Signed-off-by: Uwe Kleine-König <u.kleine-koenig@xxxxxxxxxxxxxx> > --- > Hello, > > my test machines didn't show a problem with e61c38d85b73 (I guess they > all happen to use UFCR.RFDIV = 0) so I'd like to ask Steve (and Mika) to > test this patch. I only compile tested it for now. This works for me. Thanks for your help. I've patched linux-next/v4.12-rc2 with this and tested on my i.MX6Q SABRESD board. Using my U-boot environment settings with/without "console=ttymxc0,115200", I am getting the same results. Regards, Steve Acked-by: Steve Twiss <stwiss.opensource@xxxxxxxxxxx> Tested-by: Steve Twiss <stwiss.opensource@xxxxxxxxxxx> > This is a combination of the patch I already posted in respose to Mika's > regression report and the insights I got from Steve's testing. > > Best regards > Uwe > > drivers/tty/serial/imx.c | 14 ++++++++++++-- > 1 file changed, 12 insertions(+), 2 deletions(-) > > diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c > index 33509b4beaec..bbefddd92bfe 100644 > --- a/drivers/tty/serial/imx.c > +++ b/drivers/tty/serial/imx.c > @@ -2184,7 +2184,9 @@ static int serial_imx_probe(struct platform_device > *pdev) > * and DCD (when they are outputs) or enables the > respective > * irqs. So set this bit early, i.e. before requesting irqs. > */ > - writel(UFCR_DCEDTE, sport->port.membase + UFCR); > + reg = readl(sport->port.membase + UFCR); > + if (!(reg & UFCR_DCEDTE)) > + writel(reg | UFCR_DCEDTE, sport->port.membase + > UFCR); > > /* > * Disable UCR3_RI and UCR3_DCD irqs. They are also not > @@ -2195,7 +2197,15 @@ static int serial_imx_probe(struct platform_device > *pdev) > sport->port.membase + UCR3); > > } else { > - writel(0, sport->port.membase + UFCR); > + unsigned long ucr3 = UCR3_DSR; > + > + reg = readl(sport->port.membase + UFCR); > + if (reg & UFCR_DCEDTE) > + writel(reg & ~UFCR_DCEDTE, sport->port.membase + > UFCR); > + > + if (!is_imx1_uart(sport)) > + ucr3 |= IMX21_UCR3_RXDMUXSEL | UCR3_ADNIMP; > + writel(ucr3, sport->port.membase + UCR3); > } > > clk_disable_unprepare(sport->clk_ipg); > -- > 2.11.0 ��.n��������+%������w��{.n�����{��ǫ����{ay�ʇڙ���f���h������_�(�階�ݢj"��������G����?���&��