Re: [PATCH v2 1/3] serial: 8250_mid: handle interrupt correctly in DMA case

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On Tue, Jan 10, 2017 at 06:31:25PM +0200, Andy Shevchenko wrote:
 Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
> ---
>  drivers/dma/hsu/pci.c              | 17 +++++++++++++++--
>  drivers/tty/serial/8250/8250_mid.c | 33 +++++++++++++++++++++++++++++++++
>  2 files changed, 48 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/dma/hsu/pci.c b/drivers/dma/hsu/pci.c
> index 4875fa428e81..ad45cd344bba 100644
> --- a/drivers/dma/hsu/pci.c
> +++ b/drivers/dma/hsu/pci.c
> @@ -23,15 +23,28 @@
>  
>  #define HSU_PCI_CHAN_OFFSET	0x100
>  
> +#define PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA	0x081e
> +#define PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA	0x1192
> +
>  static irqreturn_t hsu_pci_irq(int irq, void *dev)
>  {
>  	struct hsu_dma_chip *chip = dev;
> +	struct pci_dev *pdev = to_pci_dev(chip->dev);
>  	u32 dmaisr;
>  	u32 status;
>  	unsigned short i;
>  	int ret = 0;
>  	int err;
>  
> +	/*
> +	 * On Intel Tangier B0 and Anniedale the interrupt line, disregarding
> +	 * to have different numbers, is shared between HSU DMA and UART IPs.
> +	 * Thus on such SoCs we are expecting that IRQ handler is called in
> +	 * UART driver only.
> +	 */
> +	if (pdev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA)
> +		return IRQ_HANDLED;
> +
>  	dmaisr = readl(chip->regs + HSU_PCI_DMAISR);
>  	for (i = 0; i < chip->hsu->nr_channels; i++) {
>  		if (dmaisr & 0x1) {
> @@ -113,8 +126,8 @@ static void hsu_pci_remove(struct pci_dev *pdev)
>  }
>  
>  static const struct pci_device_id hsu_pci_id_table[] = {
> -	{ PCI_VDEVICE(INTEL, 0x081e), 0 },
> -	{ PCI_VDEVICE(INTEL, 0x1192), 0 },
> +	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MFLD_HSU_DMA), 0 },
> +	{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_MRFLD_HSU_DMA), 0 },

I feel this deserves to be a separate path, or does it break stuff..?

-- 
~Vinod
--
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