Hi all, we have custom board with Allwinner A20 and we try to configure ttyS1-ttyS7 to use high speed configuration and set 921600 using: stty -F /dev/ttyS1 921600 Unfortunately max what we can see using oscilloscope is 750000. Since source clock for UART defined by device tree on this platform is osc24M (24MHz oscillator): # cat /sys/class/tty/ttyS1/uartclk 24000000 If this is correct then only way to get 750000 is 64 divisor (CLK_RAT_N and CLK_RAT_M). Not sure if value in sysfs should reflect that: # cat /sys/class/tty/ttyS1/custom_divisor 0 I also can't change that value from root account getting 'permission denied'. Anyone know what maybe issue with speed capped to 750000 ? I found that some people had problems with error rate on higher speed [1], but it was for legacy kernel. Is there a way to change APB1 clock in device tree to something higher ? At this point in sun7i-a20.dtsi I see pll6 which also seems to use osc24M. Does anyone had experience in setting higher speed for UARTs using A20 chip ? What should approach for that ? We have 4.7 kernel put together with uboot and rootfs using buildroot. If I confuse something please let me know. [1] http://linux-sunxi.narkive.com/thhIDej9/a20-high-speed-uart-problem -- Best Regards, Piotr Król Embedded Systems Consultant http://3mdeb.com | @3mdeb_com -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
