Hi Lucas
On 08/06/2015 01:03 AM, Lucas Stach wrote:
The DMA transfer is only started once we are sure it will finish
in a limited time, i.e. only after we received a RRDY interrupt.
In order to allow the watermark level to be raised the aging
timer and the corresponding interrupt need to be set up as an
additional trigger, so that the transfer is also started if the
incoming amount of bytes never reach the watermark.
Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
---
drivers/tty/serial/imx.c | 23 ++++++++++++++++++-----
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index d9d74c691989..0a7f696b947b 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -139,6 +139,7 @@
#define USR1_ESCF (1<<11) /* Escape seq interrupt flag */
#define USR1_FRAMERR (1<<10) /* Frame error interrupt flag */
#define USR1_RRDY (1<<9) /* Receiver ready interrupt/dma flag */
+#define USR1_AGTIM (1<<8) /* Ageing timer interrupt flag */
#define USR1_TIMEOUT (1<<7) /* Receive timeout interrupt status */
#define USR1_RXDS (1<<6) /* Receiver idle interrupt flag */
#define USR1_AIRINT (1<<5) /* Async IR wake interrupt flag */
@@ -725,11 +726,15 @@ static void imx_dma_rxint(struct imx_port *sport)
if ((temp & USR2_RDR) && !sport->dma_is_rxing) {
sport->dma_is_rxing = 1;
- /* disable the `Recerver Ready Interrrupt` */
+ /* disable the receiver ready and aging timer interrupts */
temp = readl(sport->port.membase + UCR1);
temp &= ~(UCR1_RRDYEN);
writel(temp, sport->port.membase + UCR1);
+ temp = readl(sport->port.membase + UCR2);
+ temp &= ~(UCR2_ATEN);
+ writel(temp, sport->port.membase + UCR2);
+
/* tell the DMA to receive the data. */
start_rx_dma(sport);
}
@@ -746,7 +751,7 @@ static irqreturn_t imx_int(int irq, void *dev_id)
sts = readl(sport->port.membase + USR1);
sts2 = readl(sport->port.membase + USR2);
- if (sts & USR1_RRDY) {
+ if (sts & (USR1_RRDY | USR1_AGTIM)) {
if (sport->dma_is_enabled)
imx_dma_rxint(sport);
else
@@ -858,11 +863,15 @@ static void imx_rx_dma_done(struct imx_port *sport)
spin_lock_irqsave(&sport->port.lock, flags);
- /* Enable this interrupt when the RXFIFO is empty. */
+ /* re-enable interrupts to get notified when new symbols are incoming */
temp = readl(sport->port.membase + UCR1);
temp |= UCR1_RRDYEN;
writel(temp, sport->port.membase + UCR1);
+ temp = readl(sport->port.membase + UCR2);
+ temp |= UCR2_ATEN;
+ writel(temp, sport->port.membase + UCR2);
+
sport->dma_is_rxing = 0;
/* Is the shutdown waiting for us? */
@@ -1061,6 +1070,10 @@ static void imx_enable_dma(struct imx_port *sport)
UCR1_ICD_REG(3);
writel(temp, sport->port.membase + UCR1);
+ temp = readl(sport->port.membase + UCR2);
+ temp |= UCR2_ATEN;
+ writel(temp, sport->port.membase + UCR2);
+
/* set UCR4 */
temp = readl(sport->port.membase + UCR4);
temp |= UCR4_IDDMAEN;
@@ -1080,7 +1093,7 @@ static void imx_disable_dma(struct imx_port *sport)
/* clear UCR2 */
temp = readl(sport->port.membase + UCR2);
- temp &= ~(UCR2_CTSC | UCR2_CTS);
+ temp &= ~(UCR2_CTSC | UCR2_CTS | UCR2_ATEN);
writel(temp, sport->port.membase + UCR2);
/* clear UCR4 */
@@ -1384,7 +1397,7 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios,
old_txrxen = readl(sport->port.membase + UCR2);
writel(old_txrxen & ~(UCR2_TXEN | UCR2_RXEN),
sport->port.membase + UCR2);
- old_txrxen &= (UCR2_TXEN | UCR2_RXEN);
+ old_txrxen &= (UCR2_TXEN | UCR2_RXEN | UCR2_ATEN);
old_txrxen is no longer a proper naming here,
maybe old_ucr2 is better?
Thanks,
Jiada
/* custom-baudrate handling */
div = sport->port.uartclk / (baud * 16);
--
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