Hi Lucas
On 08/06/2015 01:03 AM, Lucas Stach wrote:
Simplify the DMA restart logic to always queue up the next transfer
immediately if there is at least one more byte available in the FIFO,
so that the transfer will finish in a limited time.
This way the driver stops to rely on zero length transfers to signal
transfers ends. Those will go away when the idle detect DMA requests
are disabled.
Signed-off-by: Lucas Stach <l.stach@xxxxxxxxxxxxxx>
---
drivers/tty/serial/imx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 0a7f696b947b..7bb683264013 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -920,9 +920,9 @@ static void dma_rx_callback(void *data)
if (!(sport->port.ignore_status_mask & URXD_DUMMY_READ))
tty_insert_flip_string(port, sport->rx_buf, count);
tty_flip_buffer_push(port);
+ }
- start_rx_dma(sport);
- } else if (readl(sport->port.membase + USR2) & USR2_RDR) {
+ if (readl(sport->port.membase + USR2) & USR2_RDR) {
With this patch,
now the comments in this block for both condition need to be
updated accordingly
Thanks,
Jiada
/*
* start rx_dma directly once data in RXFIFO, more efficient
* than before:
--
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