On Thu, 30 Jul 2015 20:44:48 -0300
Fabio Estevam <festevam@xxxxxxxxx> wrote:
> Hi David,
>
> On Thu, Jul 30, 2015 at 3:10 AM, David Jander <david@xxxxxxxxxxx> wrote:
>
> > Thanks for testing.
> > Just to be sure, from reading Chapter 63.3.2.1 of the i.MX6Q reference
> > manual, I understand that peripheral clock is needed for accessing
> > registers, while ipg clock ("module clock") is used for shift registers
> > and state-machine. AFAICS, enabling peripheral clock should be enough for
> > resetting the UART. Do you agree
>
> I have "i.MX 6Dual/6Quad Applications Processor Reference Manual, Rev.
> 2, 06/2014" version.
>
> Table 64-6 shows the UART Clocks.
>
> Clock name Clock Root Description
> ipg_clk ipg_clk_root Peripheral clock
> ipg_clk_s ipg_clk_root Peripheral access clock
> ipg_perclk uart_clk_root Module clock
>
> For register access I would expect that we only need ipg_clk turned on.
The naming is a bit confusing... As I understood (didn't check the actual
clock ids) from the code:
"Peripheral clock", named ipg_clk == sport->clk_per
"Module clock", named ipg_perclk == sport->clk_ipg
If my assumption is correct, then your expectation is also met.
> Not sure why your patch works by turning on ipg_perclk instead.
As I said above, I was convinced that I had turned on "ipg_clk", what they
call the "Peripheral clock" and what in code is called "sport->clk_per".
Maybe I should change this to turning on both clocks better then... just to be
sure?
Best regards,
--
David Jander
Protonic Holland.
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