On Fri, Mar 13, 2015 at 01:41:02PM -0400, Peter Hurley wrote: > I think this would be much cleaner keeping the existing register index > symbolic constants and using a remapping LUT with inline i/o accessors. > > Plus it has the advantage of disallowing certain indexes which are not > mapped (rather than an accidental alias). > > I realize that was not the original model set forth but I don't think > the original model contemplated a complete remap. In that case, we will want to ensure that we cache the data register and flag register iomem pointer in loops, so we don't have to constantly reload the base and offsets. This code gets run on some fairly slow ARM systems - including entirely FPGA based systems. -- FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net. -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
