On Tue, Mar 10, 2015 at 4:47 AM, Tim Kryger <tim.kryger@xxxxxxxxx> wrote: > On Mon, Mar 9, 2015 at 8:05 AM, Alan Cox <alan@xxxxxxxxxxxxxxx> wrote: > >> Ah no - I meant what is their official software workaround for existing >> parts with the bug ? Presumably they have an errata document that >> discusses this and the correct methods they recommend to avoid the >> hang ? > > As far as I know, the only advice they provided was rather naive. > > The documentation I saw suggested stashing a copy of the LCR and then > rewriting it when the special LCR write failed interrupt was raised. > > That approach was not workable as the LCR might be written while the > interrupt is masked causing the sequence of register writes to occur > in an order other than what was desired. > > Additionally, when the LCR needed to be re-written but the UART stayed > busy, the interrupt would keep firing and the driver would starve out > everything else on the CPU. > > The current workaround of clearing fifos and retrying a fixed number > of times isn't ideal but I'm not sure what else can be done given the > way this hardware works. > > Additional background is in c49436b657d0a56a6ad90d14a7c3041add7cf64d I hit the similar problem as Zhang described quite long ago when I tried to write to the port chosen as console. In my case seems the same (DW) IP is enumerated via PCI. Do we need to tweak PCI cases as well? -- With Best Regards, Andy Shevchenko -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
