On Wed, Mar 04, 2015 at 05:59:50PM +0000, Andre Przywara wrote: > The PL011 register UART_MIS is actually a bitwise AND of the > UART_RIS and the UART_MISC register. > Since the SBSA UART does not include the _MIS register, use the > two separate registers to get the same behaviour. Since we are > inside the spinlock and we read the _IMSC register only once, there > should be no race issue. Do we really need to go all the way to the hardware for this? Isn't uap->im sufficient? Reading from memory is potentially faster as it could be in the CPU caches. -- FTTC broadband for 0.8mile line: currently at 10.5Mbps down 400kbps up according to speedtest.net. -- To unsubscribe from this list: send the line "unsubscribe linux-serial" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
