Have checked with the designer of the UART block and he confirmed that
the 2835 PL011 contains a 16 deep fifo not 32 deep...
Hardware guys, they can never just leave it alone!!!
Gordon
On 21 May 2013 07:07, Jongsung Kim <neidhard.kim@xxxxxxx> wrote:
> Jongsung Kim <neidhard.kim@xxxxxxx> :
>> diff --git a/arch/arm/boot/dts/bcm2835.dtsi
> b/arch/arm/boot/dts/bcm2835.dtsi
>> index f0052dc..1e12aef 100644
>> --- a/arch/arm/boot/dts/bcm2835.dtsi
>> +++ b/arch/arm/boot/dts/bcm2835.dtsi
>> @@ -44,6 +44,7 @@
>> reg = <0x7e201000 0x1000>;
>> interrupts = <2 25>;
>> clock-frequency = <3000000>;
>> + arm,primecell-periphid = <0x00241011>;
>> };
>>
>> gpio: gpio {
>
> Stephen, how do you think about this kind of approach instead?
>
>
> _______________________________________________
> linux-rpi-kernel mailing list
> linux-rpi-kernel@xxxxxxxxxxxxxxxxxxx
> http://lists.infradead.org/mailman/listinfo/linux-rpi-kernel
--
To unsubscribe from this list: send the line "unsubscribe linux-serial" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
