Re: [PATCH v5] serial: spi: add spi-uart driver for Maxim 3110

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On Tuesday 02 March 2010, Feng Tang wrote:
> > > Here comes another idea, can we add a capability flag in struct
> > > spi_master indicating the master supporting poll or dma or both.
> > > Also we add similar bits in struct spi_transfer indicating the this
> > > transfer wants to be handled in poll or dma mode.
> > 
> > Let's not do either of those.  There's no need to introduce such
> > complexity, or to enable the associated new failure modes and bugs.
> 
> This idea has nothing to do with the dma-safe problem you pointed out,

Your comment has nothing to do with my response.  Are you implying that
your suggestions do *NOT* introduce complexity, including new failure
modes and thus the possibility of new confusing types of bugs?


> I will 
> make the buffer dma safe anyway.

Good ...

 
> What I proposed just wants to provide some flexibility for protocol device
> drivers, it will use dma-safe buffer always, but it prefer not to use DMA
> for its one-word transfers,

That kind of heuristic is something the SPI controller driver could
already apply if it's a good tradeoff on that hardware.  (Considering
also the extra added complexity, failure modes, and potential for new
flavors of bug...)

Of course, drivers like the max3110 are high enough in the driver
stack that they can only guess about such tradeoffs.  (And thus
most drivers will likely guess wrong...)


> and hope to have a choice to do that. For current 
> existing controller and device drivers, they can simply ignore the new 
> working mode setting in struct spi_master and spi_transfer and leave them
> as 0.

If someone decided to update a SPI controller driver to avoid DMA in
some cases, in favor of PIO, they could already code such heuristics
without needing your proposed hinting from upper layers.

The result in the low-level driver would be just to use a different
test (maybe "is this a one-word transfer?" instead of checking your
per-transfer "use PIO?" hint) before kicking in whatever logic you
think would improve performance (by eliminating DMA setup and teardown
costs, including cache cleaning).

- Dave

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