Refactor phy_power_on and phy_calibrate callbacks. In Current code regulators enable, clks enable, calibrating UFS PHY, start_serdes and polling PCS_ready_status are part of phy_power_on. UFS PHY registers are retained after power collapse, meaning calibrating UFS PHY, start_serdes and polling PCS_ready_status can be done only when hba is powered_on, and not needed every time when phy_power_on is called during resume. Hence keep the code which enables PHY's regulators & clks in phy_power_on and move the rest steps into phy_calibrate function. Since phy_power_on is separated out from phy calibrate, make separate calls to phy_power_on and phy_calibrate calls from ufs qcom driver. Also for better power saving, remove the phy_power_on/off calls from resume/suspend path and put them to ufs_qcom_setup_clocks, so that PHY's regulators & clks can be turned on/off along with UFS's clocks. This patch series is tested on SM8550 MTP, SM8350 MTP and SA8775p. There is functional dependency between ufs-qcom and phy-qcom-qmp-ufs and hence both the patches should be part of same merge window. Nitin Rawat (2): scsi: ufs: qcom : Refactor phy_power_on/off calls phy: qcom: Refactor phy_power_on and phy_calibrate callbacks drivers/phy/qualcomm/phy-qcom-qmp-ufs.c | 183 +++++++++--------------- drivers/ufs/host/ufs-qcom.c | 104 +++++++++----- drivers/ufs/host/ufs-qcom.h | 4 + 3 files changed, 139 insertions(+), 152 deletions(-) -- 2.43.0
