On Wed, Nov 08, 2023 at 04:42:42PM +0800, Can Guo wrote:
> Hi Mani,
>
> On 11/8/2023 1:25 PM, Manivannan Sadhasivam wrote:
> > On Mon, Nov 06, 2023 at 08:46:10PM -0800, Can Guo wrote:
> > > From: Can Guo <quic_cang@xxxxxxxxxxx>
> > >
> > > Qcom UFS hosts, with HW ver 5, can only support up to HS-G5 Rate-A due to
> > > HW limitations. If the HS-G5 PHY gear is used, update host_params->hs_rate
> > > to Rate-A, so that the subsequent power mode changes shall stick to Rate-A.
> > >
> > > Signed-off-by: Can Guo <quic_cang@xxxxxxxxxxx>
> > > ---
> > > drivers/ufs/host/ufs-qcom.c | 18 +++++++++++++++++-
> > > 1 file changed, 17 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c
> > > index 60b35ca..55ee31d 100644
> > > --- a/drivers/ufs/host/ufs-qcom.c
> > > +++ b/drivers/ufs/host/ufs-qcom.c
> > > @@ -442,9 +442,25 @@ static u32 ufs_qcom_get_hs_gear(struct ufs_hba *hba)
> > > static int ufs_qcom_power_up_sequence(struct ufs_hba *hba)
> > > {
> > > struct ufs_qcom_host *host = ufshcd_get_variant(hba);
> > > + struct ufs_host_params *host_params = &host->host_params;
> > > struct phy *phy = host->generic_phy;
> > > + enum phy_mode mode;
> > > int ret;
> > > + /*
> > > + * HW ver 5 can only support up to HS-G5 Rate-A due to HW limitations.
> >
> > Does this limitation apply to future targets as well or just to SM8550? If
> > it's the latter, then we need to use a flag.
> >
> > - ManiUFS host controller HW ver (major) 5 IPs (they may have different
> minor/step verions) can be used by many QCOM chipsets, so it applies to
> several available targets and future targets which are going to have HW ver
> 5 UFS host controller. This limitation goes away since HW ver 6.
>
Okay, thanks for clarifying.
- Mani
> Thanks,
> Can Guo.
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