Hi Peter,
Thanks for posting this fix.
On Wed, 2021-05-12 at 16:39 +0800, peter.wang@xxxxxxxxxxxx wrote:
> From: Peter Wang <peter.wang@xxxxxxxxxxxx>
>
> As per specs, e.g, JESD220E chapter 7.2, while powering off
> the ufs device, RST_N signal should be between VSS(Ground)
> and VCCQ/VCCQ2. The power down sequence after fixing as below:
>
> Power down:
> 1. Assert RST_N low
> 2. Turn-off VCC
> 3. Turn-off VCCQ/VCCQ2
>
> Change-Id: I297e9afe3c22bb1a5fc5e7acce9b5ecfd20181ed
Please drop Change-Id line.
> Signed-off-by: Peter Wang <peter.wang@xxxxxxxxxxxx>
> ---
> drivers/scsi/ufs/ufs-mediatek.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c
> index c55202b..47b4066 100644
> --- a/drivers/scsi/ufs/ufs-mediatek.c
> +++ b/drivers/scsi/ufs/ufs-mediatek.c
> @@ -922,6 +922,7 @@ static void ufs_mtk_vreg_set_lpm(struct ufs_hba *hba, bool lpm)
> static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
> {
> int err;
> + struct arm_smccc_res res;
>
> if (ufshcd_is_link_hibern8(hba)) {
> err = ufs_mtk_link_set_lpm(hba);
> @@ -941,6 +942,9 @@ static int ufs_mtk_suspend(struct ufs_hba *hba, enum ufs_pm_op pm_op)
> goto fail;
> }
>
> + if (ufshcd_is_link_off(hba))
> + ufs_mtk_device_reset_ctrl(0, res);
> +
Please also consider the case: Linkoff during suspend. In this case, HW
reset pin shall be released during resume flow.
Thanks,
Stanley Chu
