> +
> +static enum blk_crypto_mode_num
> +ufshcd_find_blk_crypto_mode(union ufs_crypto_cap_entry cap)
> +{
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(ufs_crypto_algs); i++) {
> + BUILD_BUG_ON(UFS_CRYPTO_KEY_SIZE_INVALID != 0);
> + if (ufs_crypto_algs[i].ufs_alg == cap.algorithm_id &&
> + ufs_crypto_algs[i].ufs_key_size == cap.key_size) {
> + return i;
> + }
> + }
> + return BLK_ENCRYPTION_MODE_INVALID;
BLK_ENCRYPTION_MODE_INVALID is 0, but 0 is a valid mode num?
> +}
> +
> +/**
> + * ufshcd_hba_init_crypto_capabilities - Read crypto capabilities, init crypto
> + * fields in hba
> + * @hba: Per adapter instance
> + *
> + * Return: 0 if crypto was initialized or is not supported, else a -errno value.
> + */
> +int ufshcd_hba_init_crypto_capabilities(struct ufs_hba *hba)
> +{
> + int cap_idx;
> + int err = 0;
> + enum blk_crypto_mode_num blk_mode_num;
> +
> + /*
> + * Don't use crypto if either the hardware doesn't advertise the
> + * standard crypto capability bit *or* if the vendor specific driver
> + * hasn't advertised that crypto is supported.
> + */
> + if (!(hba->capabilities & MASK_CRYPTO_SUPPORT) ||
> + !(hba->caps & UFSHCD_CAP_CRYPTO))
> + goto out;
> +
> + hba->crypto_capabilities.reg_val =
> + cpu_to_le32(ufshcd_readl(hba, REG_UFS_CCAP));
> + hba->crypto_cfg_register =
> + (u32)hba->crypto_capabilities.config_array_ptr * 0x100;
This deserve a comment, e.g.
UFSHCI says:
The address for entry x of the x-CRYPTOCFG array is calculated as follows:
ADDR (x-CRYPTOCFG) = UFS_HCI_BASE + CFGPTR*100h + x*80h
