Re: [PATCH v4 08/11] qla2xxx: Fix the code that reads from mailbox registers

[Bart Van Assche <bvanassche@xxxxxxx>]

On 2020-05-11 00:39, Arun Easi wrote:
> On Sun, 26 Apr 2020, 8:03pm, Bart Van Assche wrote:
>>  	default:
>> -		ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1);
>> -		ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2);
>> -		ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3);
>> -		ha->aenmb[4] = RD_REG_WORD(&reg->aenmailbox4);
>> -		ha->aenmb[5] = RD_REG_WORD(&reg->aenmailbox5);
>> -		ha->aenmb[6] = RD_REG_WORD(&reg->aenmailbox6);
>> -		ha->aenmb[7] = RD_REG_WORD(&reg->aenmailbox7);
>> +		ha->aenmb[1] = RD_REG_DWORD(&reg->aenmailbox1);
>> +		ha->aenmb[2] = RD_REG_DWORD(&reg->aenmailbox2);
>> +		ha->aenmb[3] = RD_REG_DWORD(&reg->aenmailbox3);
>> +		ha->aenmb[4] = RD_REG_DWORD(&reg->aenmailbox4);
>> +		ha->aenmb[5] = RD_REG_DWORD(&reg->aenmailbox5);
>> +		ha->aenmb[6] = RD_REG_DWORD(&reg->aenmailbox6);
>> +		ha->aenmb[7] = RD_REG_DWORD(&reg->aenmailbox7);
> 
> Please leave the older access as is. The way you did is right, but
> these adapters are not frequently qualified, so please leave it the
> tested way.

The current code silently truncates 32-bit values into 16-bit values on
little endian architectures. The current code is totally broken on big
endian architectures. So I think the above changes are an important bug
fix. If these changes would introduce a regression, these changes are
easy to revert.

Thanks,

Bart.