On Thu 06 Feb 17:09 PST 2020, Can Guo wrote:
> On 2020-02-07 04:33, Bjorn Andersson wrote:
> > On Thu 06 Feb 00:33 PST 2020, Can Guo wrote:
> >
> > > After enter hibern8, as UFS JEDEC ver 3.0 requires, a specific
> > > gating wait
> > > time is required before disable the device reference clock. If it is
> > > not
> > > specified, use the old delay.
> > >
> > > Signed-off-by: Can Guo <cang@xxxxxxxxxxxxxx>
> > > Reviewed-by: Asutosh Das <asutoshd@xxxxxxxxxxxxxx>
> > > Reviewed-by: Hongwu Su <hongwus@xxxxxxxxxxxxxx>
> > > ---
> > > drivers/scsi/ufs/ufs-qcom.c | 22 +++++++++++++++++++---
> > > 1 file changed, 19 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/scsi/ufs/ufs-qcom.c b/drivers/scsi/ufs/ufs-qcom.c
> > > index 85d7c17..39eefa4 100644
> > > --- a/drivers/scsi/ufs/ufs-qcom.c
> > > +++ b/drivers/scsi/ufs/ufs-qcom.c
> > > @@ -833,6 +833,8 @@ static int ufs_qcom_bus_register(struct
> > > ufs_qcom_host *host)
> > >
> > > static void ufs_qcom_dev_ref_clk_ctrl(struct ufs_qcom_host *host,
> > > bool enable)
> > > {
> > > + unsigned long gating_wait;
> > > +
> > > if (host->dev_ref_clk_ctrl_mmio &&
> > > (enable ^ host->is_dev_ref_clk_enabled)) {
> > > u32 temp = readl_relaxed(host->dev_ref_clk_ctrl_mmio);
> > > @@ -845,11 +847,25 @@ static void ufs_qcom_dev_ref_clk_ctrl(struct
> > > ufs_qcom_host *host, bool enable)
> > > /*
> > > * If we are here to disable this clock it might be immediately
> > > * after entering into hibern8 in which case we need to make
> > > - * sure that device ref_clk is active at least 1us after the
> > > + * sure that device ref_clk is active for specific time after
> > > * hibern8 enter.
> > > */
> > > - if (!enable)
> > > - udelay(1);
> > > + if (!enable) {
> > > + gating_wait = host->hba->dev_info.clk_gating_wait_us;
> > > + if (!gating_wait) {
> >
> > Afaict this can't happen, because in patch 6 you check for gating_wait
> > being 0 and if so set it to 0xff.
> >
>
> Sorry, I was intended to give clk_gating_wait_us values only if it is
> a UFS3.0 device. I will revise patch 6/8.
>
Okay, sounds good.
> > > + udelay(1);
> > > + } else {
> > > + /*
> > > + * bRefClkGatingWaitTime defines the minimum
> > > + * time for which the reference clock is
> > > + * required by device during transition from
> > > + * HS-MODE to LS-MODE or HIBERN8 state. Give it
> > > + * more time to be on the safe side.
> > > + */
> > > + gating_wait += 10;
> > > + usleep_range(gating_wait, gating_wait + 10);
> >
> > I presume there's no strong requirement on the max, so how about using a
> > substantially larger max - say 1k, or 10k - to allow the usleep_range()
> > to do it's job?
> >
> >
> > PS. Please include linux-arm-msm@ on all the patches in the series, not
> > just two of them.
> >
> > Regards,
> > Bjorn
> >
>
> bRefClkGatingWaitTime, as vendor defined in their device attribute is
> usually
> around 50~100, 1k or 10k delay makes it too large. usleep_range() works well
> so long as the delay is within (10us - 20ms), so I added 10 to make sure it
> is
> above 10us.
>
I meant specifically the second parameter, i.e:
usleep_range(bRefClkGatingWaitTime + 10, bRefClkGatingWaitTime + 1000);
As you're not guaranteed an upper bound of this sleep anyway you might
as well give usleep_range() a window of a millisecond (or more) to give
it the flexibility of matching other timer events.
The only drawback with this is that you might "waste" a millisecond.
Regards,
Bjorn
> SLEEPING FOR ~USECS OR SMALL MSECS ( 10us - 20ms):
> * Use usleep_range
> https://www.kernel.org/doc/Documentation/timers/timers-howto.txt
>
> Thanks,
>
> Can Guo.
>
> > > + }
> > > + }
> > >
> > > writel_relaxed(temp, host->dev_ref_clk_ctrl_mmio);
> > >
> > > --
> > > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora
> > > Forum,
> > > a Linux Foundation Collaborative Project
