On 15/01/2019 13:37, Marc Gonzalez wrote: > After adding the "regulator-allow-set-load" property to the vreg DT nodes, > the UFSHC driver was finally able to talk to the Flash chip! > > However, all is not well yet :-) > > First, I had to turn ufshcd_set_vccq_rail_unused() into a NOP, otherwise > my board locks up and reboots. I'm not sure how to handle this issue > gracefully? The bootloader log after such a reboot is: Format: Log Type - Time(microsec) - Message - Optional Info Log Type: B - Since Boot(Power On Reset), D - Delta, S - Statistic S - QC_IMAGE_VERSION_STRING=BOOT.XF.1.2.2-00157-M8998LZB-1 S - IMAGE_VARIANT_STRING=Msm8998LA S - OEM_IMAGE_VERSION_STRING=speedcore S - Boot Interface: UFS S - Secure Boot: Off S - Boot Config @ 0x00786070 = 0x000002c1 S - JTAG ID @ 0x00786130 = 0x200620e1 S - OEM ID @ 0x00786138 = 0x00000000 S - Serial Number @ 0x00784138 = 0x13ab5626 S - OEM Config Row 0 @ 0x00784188 = 0x0000000000000000 S - OEM Config Row 1 @ 0x00784190 = 0x0000000000004000 S - Feature Config Row 0 @ 0x007841a0 = 0x0050300000000000 S - Feature Config Row 1 @ 0x007841a8 = 0x0000ffff00087fff S - Core 0 Frequency, 1305 MHz S - PBL Patch Ver: 1 B - 0 - PBL, Start B - 9445 - bootable_media_detect_entry, Start B - 55539 - bootable_media_detect_success, Start B - 55546 - elf_loader_entry, Start B - 56841 - auth_hash_seg_entry, Start B - 57154 - auth_hash_seg_exit, Start B - 107620 - elf_segs_hash_verify_entry, Start B - 139003 - elf_segs_hash_verify_exit, Start B - 139019 - auth_xbl_sec_hash_seg_entry, Start B - 162899 - auth_xbl_sec_hash_seg_exit, Start B - 162901 - xbl_sec_segs_hash_verify_entry, Start B - 168307 - xbl_sec_segs_hash_verify_exit, Start B - 168374 - PBL, End B - 201849 - SBL1, Start B - 323818 - boot_flash_init, Start D - 30 - boot_flash_init, Delta B - 326350 - sbl1_ddr_set_default_params, Start D - 0 - sbl1_ddr_set_default_params, Delta B - 334341 - boot_config_data_table_init, Start D - 134383 - boot_config_data_table_init, Delta - (60 Bytes) B - 473268 - CDT Version:3,Platform ID:8,Major ID:1,Minor ID:0,Subtype:1 B - 477965 - Image Load, Start D - 610 - Auth Metadata D - 549 - Segments hash check D - 12322 - PMIC Image Loaded, Delta - (45640 Bytes) B - 493612 - pm_device_init, Start B - 501145 - PM: PON REASON: PM0=0x800004000020020:0x40 PM1=0x4000004000080020:0x40 PM2=0x800004000080020:0x40 B - 560071 - PM: SET_VAL:Skip D - 62738 - pm_device_init, Delta B - 561993 - pm_driver_init, Start D - 5215 - pm_driver_init, Delta B - 570502 - pm_sbl_chg_init, Start B - 572790 - PM: Trigger FG IMA Reset B - 576358 - PM: Trigger FG IMA Reset.Completed B - 581848 - PM: BOOTUP, Debug Board being used D - 11529 - pm_sbl_chg_init, Delta B - 588802 - vsense_init, Start D - 0 - vsense_init, Delta B - 645959 - Pre_DDR_clock_init, Start D - 213 - Pre_DDR_clock_init, Delta D - 0 - sbl1_ddr_set_params, Delta B - 655384 - do_ddr_training, Start D - 0 - do_ddr_training, Delta B - 680516 - clock_init, Start D - 335 - clock_init, Delta B - 683413 - Image Load, Start D - 2105 - APDP Image Loaded, Delta - (0 Bytes) B - 893802 - usb: chgr - SDP_CHARGER B - 894412 - Image Load, Start D - 6466 - Auth Metadata D - 4270 - Segments hash check D - 16012 - XBLRamDump Image Loaded, Delta - (314564 Bytes) PM0=0x800004000020020:0x40 PM1=0x4000004000080020:0x40 PM2=0x800004000080020:0x40 8c0: 0x20 = bit 5 = Triggered from PON1 8c1: 0x00 8c2: 0x02 = bit 1 = Triggered by PS_HOLD 8c3: 0x00 8c4: 0x40 = bit 6 = PMIC entered ON state because of a warm-reset sequence 8c5: 0x00 8c6: 0x00 8c7: 0x08 = bit 3 = raw_dvdd_rb event occurred (??) 8c8: 0x40 = bit 6 = Triggered by UVLO event It is likely that something in the system requires vreg_l26a_1p2, but didn't explicitly specify the load on that regulator. Regards.
