On Thu, 2 Aug 2018, Michael Schmitz wrote: > > This redundant load of the ICR has been in the driver code for a long > time. There's a small chance it is intentional, Actually, it is intentional. > so at least minimal testing might be in order. > Minimal testing is almost useless if you are trying to prove the absence of race conditions. SCSI arbitration is a race between targets by design; so a race between the CPU and the 5380 is going to be hard to observe. > Finn - does the ICR_ARBITRATION_LOST bit have to be cleared by a write > to the mode register? > Something like that: the write to the mode register does clear the ICR_ARBITRATION_LOST bit, because it clears the MR_ARBITRATE bit. > In that case, the first load would have been redundant and can be > omitted without changing driver behaviour? This code is a faithful rendition of the arbitration flow chart in the datasheet, so even if you are right, I wouldn't want to change the code. Besides, I think your argument assumes that ICR and MR are synchronized, and also assumes that targets are obeying the spec. -- > Cheers, > > Michael > >
