On 15/02/2025 14:04, Ivaylo Ivanov wrote:
> diff --git a/arch/arm64/boot/dts/exynos/exynos2200.dtsi b/arch/arm64/boot/dts/exynos/exynos2200.dtsi
> new file mode 100644
> index 000000000..645a31d46
> --- /dev/null
> +++ b/arch/arm64/boot/dts/exynos/exynos2200.dtsi
> @@ -0,0 +1,560 @@
> +// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
> +/*
> + * Samsung's Exynos 2200 SoC device tree source
> + *
> + * Copyright (c) 2025, Ivaylo Ivanov <ivo.ivanov.ivanov1@xxxxxxxxx>
> + */
> +
> +#include <dt-bindings/clock/samsung,exynos2200.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> + compatible = "samsung,exynos2200";
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + interrupt-parent = <&gic>;
> +
> + aliases {
> + pinctrl0 = &pinctrl_alive;
> + pinctrl1 = &pinctrl_cmgp;
> + pinctrl2 = &pinctrl_hsi1;
> + pinctrl3 = &pinctrl_ufs;
> + pinctrl4 = &pinctrl_hsi1ufs;
> + pinctrl5 = &pinctrl_peric0;
> + pinctrl6 = &pinctrl_peric1;
> + pinctrl7 = &pinctrl_peric2;
> + pinctrl8 = &pinctrl_vts;
> + };
> +
> + xtcxo: clock-1 {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-output-names = "oscclk";
> + };
> +
> + ext_26m: clock-2 {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-output-names = "ext-26m";
> + };
> +
> + ext_200m: clock-3 {
> + compatible = "fixed-clock";
> + #clock-cells = <0>;
> + clock-output-names = "ext-200m";
What do these two last clocks represent? Where are they?
I see we have them also on Google GS101, so same question there :/
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu-map {
> + cluster0 {
> + core0 {
> + cpu = <&cpu0>;
> + };
> +
> + core1 {
> + cpu = <&cpu1>;
> + };
> +
> + core2 {
> + cpu = <&cpu2>;
> + };
> +
> + core3 {
> + cpu = <&cpu3>;
> + };
> + };
> +
> + cluster1 {
> + core0 {
> + cpu = <&cpu4>;
> + };
> +
> + core1 {
> + cpu = <&cpu5>;
> + };
> +
> + core2 {
> + cpu = <&cpu6>;
> + };
> + };
> +
> + cluster2 {
> + core0 {
> + cpu = <&cpu7>;
> + };
> + };
> + };
> +
> + cpu0: cpu@0 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a510";
> + reg = <0>;
> + capacity-dmips-mhz = <260>;
> + dynamic-power-coefficient = <189>;
> + enable-method = "psci";
> + cpu-idle-states = <&little_cpu_sleep>;
> + };
> +
> + cpu1: cpu@100 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a510";
> + reg = <0x100>;
> + capacity-dmips-mhz = <260>;
> + dynamic-power-coefficient = <189>;
> + enable-method = "psci";
> + cpu-idle-states = <&little_cpu_sleep>;
> + };
> +
> + cpu2: cpu@200 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a510";
> + reg = <0x200>;
> + capacity-dmips-mhz = <260>;
> + dynamic-power-coefficient = <189>;
> + enable-method = "psci";
> + cpu-idle-states = <&little_cpu_sleep>;
> + };
> +
> + cpu3: cpu@300 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a510";
> + reg = <0x300>;
> + capacity-dmips-mhz = <260>;
> + dynamic-power-coefficient = <189>;
> + enable-method = "psci";
> + cpu-idle-states = <&little_cpu_sleep>;
> + };
> +
> + cpu4: cpu@400 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a710";
> + reg = <0x400>;
> + capacity-dmips-mhz = <380>;
> + dynamic-power-coefficient = <560>;
> + enable-method = "psci";
> + cpu-idle-states = <&big_cpu_sleep>;
> + };
> +
> + cpu5: cpu@500 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a710";
> + reg = <0x500>;
> + capacity-dmips-mhz = <380>;
> + dynamic-power-coefficient = <560>;
> + enable-method = "psci";
> + cpu-idle-states = <&big_cpu_sleep>;
> + };
> +
> + cpu6: cpu@600 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a710";
> + reg = <0x600>;
> + capacity-dmips-mhz = <380>;
> + dynamic-power-coefficient = <560>;
> + enable-method = "psci";
> + cpu-idle-states = <&big_cpu_sleep>;
> + };
> +
> + cpu7: cpu@700 {
> + device_type = "cpu";
> + compatible = "arm,cortex-x2";
> + reg = <0x700>;
> + capacity-dmips-mhz = <488>;
> + dynamic-power-coefficient = <765>;
> + enable-method = "psci";
> + cpu-idle-states = <&prime_cpu_sleep>;
> + };
> +
> + idle-states {
> + entry-method = "psci";
> +
> + little_cpu_sleep: cpu-sleep-0 {
> + compatible = "arm,idle-state";
> + idle-state-name = "c2";
> + entry-latency-us = <70>;
> + exit-latency-us = <170>;
> + min-residency-us = <2000>;
> + arm,psci-suspend-param = <0x10000>;
> + };
> +
> + big_cpu_sleep: cpu-sleep-1 {
> + compatible = "arm,idle-state";
> + idle-state-name = "c2";
> + entry-latency-us = <235>;
> + exit-latency-us = <220>;
> + min-residency-us = <3500>;
> + arm,psci-suspend-param = <0x10000>;
> + };
> +
> + prime_cpu_sleep: cpu-sleep-2 {
> + compatible = "arm,idle-state";
> + idle-state-name = "c2";
> + entry-latency-us = <150>;
> + exit-latency-us = <190>;
> + min-residency-us = <2500>;
> + arm,psci-suspend-param = <0x10000>;
> + };
> + };
> + };
> +
> + pmu-a510 {
> + compatible = "arm,cortex-a510-pmu";
> + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster0>;
> + };
> +
> + pmu-a710 {
> + compatible = "arm,cortex-a710-pmu";
> + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster1>;
> + };
> +
> + pmu-x2 {
> + compatible = "arm,cortex-x2-pmu";
> + interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH &ppi_cluster2>;
> + };
> +
> + psci {
> + compatible = "arm,psci-1.0";
> + method = "smc";
> + };
> +
> + soc {
> + compatible = "simple-bus";
> + ranges;
> +
> + #address-cells = <2>;
> + #size-cells = <2>;
> +
> + chipid@10000000 {
> + compatible = "samsung,exynos2200-chipid",
> + "samsung,exynos850-chipid";
> + reg = <0 0x10000000 0 0x24>;
All numbers in hex please:
s/0/0x0/
> + };
> +
Rest looks good.
Best regards,
Krzysztof
