Hey folks, This patchset introduces clock driver support for Exynos 2200. It's modelled to take advantage of hwacg (hardware auto-clock gating). This means gates are not defined, so that hwacg takes care of the gating, which leads to a smaller and simpler clock driver design. Gate register definitions are left so that they're documented and in case a gate needs to be forcefully left open in the future, we won't have to define the register. Best regards, Ivaylo Ivaylo Ivanov (3): dt-bindings: clock: add Exynos2200 SoC clk: samsung: clk-pll: add support for pll_4311 clk: samsung: introduce Exynos2200 clock driver .../clock/samsung,exynos2200-clock.yaml | 247 ++ drivers/clk/samsung/Makefile | 1 + drivers/clk/samsung/clk-exynos2200.c | 3928 +++++++++++++++++ drivers/clk/samsung/clk-pll.c | 1 + drivers/clk/samsung/clk-pll.h | 1 + .../dt-bindings/clock/samsung,exynos2200.h | 431 ++ 6 files changed, 4609 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/samsung,exynos2200-clock.yaml create mode 100644 drivers/clk/samsung/clk-exynos2200.c create mode 100644 include/dt-bindings/clock/samsung,exynos2200.h -- 2.43.0
