On Fri, Feb 14, 2025 at 12:39 AM Tudor Ambarus <tudor.ambarus@xxxxxxxxxx> wrote: > > Hi, Sam, > > On 2/14/25 12:08 AM, Sam Protsenko wrote: > > On Thu, Feb 13, 2025 at 2:41 PM Denzeel Oliva <wachiturroxd150@xxxxxxxxx> wrote: > >> > >> Exynos990 uses the same version of USI SPI (v2.1) as the GS101. > >> Removed fifo_lvl_mask and rx_lvl_offset, and changed to the new data > >> configuration port. > >> > >> The difference from other new port configuration data is that fifo_depth > >> is only specified in fifo-depth in DT. > >> > > > > In the code below I can see this bit: > > > > /* If not specified in DT, defaults to 64 */ > > .fifo_depth = 64, > > > > Is that intentional or is it some leftover that was meant to be > > removed before the submission? From s3c64xx_spi_probe() it looks like > > the "fifo-depth" DT property is ignored if .fifo_depth is set in the > > port_config: > > fifo-depth in port config is intended for IPs where all their instances > use the same FIFO depth. fifo-depth from DT is ignored because the > compatible knows better than what developers may in DT in this case, it > is intentional. > > > > > if (sdd->port_conf->fifo_depth) > > sdd->fifo_depth = sdd->port_conf->fifo_depth; > > else if (of_property_read_u32(pdev->dev.of_node, "fifo-depth", > > &sdd->fifo_depth)) > > sdd->fifo_depth = FIFO_DEPTH(sdd); > > > > Btw, wouldn't it be reasonable to flip this probe() code the other way > > No, please. IPs that have instances with different FIFO depths shall > rely only on DT to specify their FIFO depths. > Fair enough. Does it mean the port_config.fifo_depth should be made obsolete? Or it makes sense for older SoCs where FIFO depth is fixed, or something like that? > Cheers, > ta
