On Mon, 2025-01-20 at 22:34 +0000, Peter Griffin wrote: > On gs101 SoC the fltcon0 (filter configuration 0) offset > isn't at a fixed offset like previous SoCs as the fltcon1 > register only exists when there are more than 4 pins in the > bank. > > Add a eint_fltcon_offset and new GS101_PIN_BANK_EINT* > macros that take an additional fltcon_offs variable. > > This can then be used in suspend/resume callbacks to > save and restore the fltcon0 and fltcon1 registers. > > Signed-off-by: Peter Griffin <peter.griffin@xxxxxxxxxx> Reviewed-by: André Draszik <andre.draszik@xxxxxxxxxx>
