On 12/06/2024, André Draszik wrote: > Hi, > > This series enables USB3 Type-C lane orientation detection and > configuration on platforms that support this (Google gs101), and it > also allows the DWC3 core to enter runtime suspend even when UDC is > active. > > For lane orientation, this driver now optionally (based on DT) > subscribes to the TCPC's lane orientation notifier and remembers the > orientation to later be used during phy_init(). > > To enable DWC3 runtime suspend, the gadget needs to inform the core via > dwc3_gadget_interrupt() with event type == DWC3_DEVICE_EVENT_DISCONNECT > of a cable disconnect. For that to allow to happen, this driver > therefore needs to stop forcing the Vbus and bvalid signals to active > and instead change their state based on actual conditions. The same > TCPC notifier is used to detect this, and program the hardware > accordingly. > > That signal state is based on advice given by Thinh in > https://lore.kernel.org/all/20240813230625.jgkatqstyhcmpezv@xxxxxxxxxxxx/ > > Both changes together now allow cable orientation detection to work, as > the DWC3 will now call phy_exit() on cable disconnect, and we can > reprogram the lane mux in phy_init(). > > On top of that, there are some small related cleanup patches. > > Signed-off-by: André Draszik <andre.draszik@xxxxxxxxxx> > --- > Changes in v4: > - separate out patch 5 'phy: exynos5-usbdrd: gs101: ensure power is > gated to SS phy in phy_exit()' from this series, as a stable patch > shouldn't be buried inside a series like this (Greg) > Link: https://lore.kernel.org/all/20241205-gs101-usb-phy-fix-v4-1-0278809fb810@xxxxxxxxxx/ > - Link to v3: https://lore.kernel.org/r/20241205-gs101-phy-lanes-orientation-phy-v3-0-32f721bed219@xxxxxxxxxx > > Changes in v3: > - patches 1 & 2: update as per Rob's suggestions > - patch 7 & 8: drop init to -1 of phy_drd->orientation (Vinod) > - patch 7: avoid an #ifdef > - Link to v2: https://lore.kernel.org/r/20241203-gs101-phy-lanes-orientation-phy-v2-0-40dcf1b7670d@xxxxxxxxxx > > Changes in v2: > - squash patches #2 and #3 from v1 to actually disallow > orientation-switch on !gs101 (not just optional) (Conor) > - update bindings commit message to clarify that the intention for the > driver is to work with old and new DTS (Conor) > - add cc-stable and fixes tags to power gating patch (Krzysztof) > - fix an #include and typo (Peter) > - Link to v1: https://lore.kernel.org/r/20241127-gs101-phy-lanes-orientation-phy-v1-0-1b7fce24960b@xxxxxxxxxx > > --- > André Draszik (7): > dt-bindings: phy: samsung,usb3-drd-phy: add blank lines between DT properties > dt-bindings: phy: samsung,usb3-drd-phy: gs101: require Type-C properties > phy: exynos5-usbdrd: convert to dev_err_probe > phy: exynos5-usbdrd: fix EDS distribution tuning (gs101) > phy: exynos5-usbdrd: gs101: configure SS lanes based on orientation > phy: exynos5-usbdrd: subscribe to orientation notifier if required > phy: exynos5-usbdrd: allow DWC3 runtime suspend with UDC bound (E850+) > > .../bindings/phy/samsung,usb3-drd-phy.yaml | 21 ++- > drivers/phy/samsung/Kconfig | 1 + > drivers/phy/samsung/phy-exynos5-usbdrd.c | 202 ++++++++++++++++----- > 3 files changed, 182 insertions(+), 42 deletions(-) > --- > base-commit: c245a7a79602ccbee780c004c1e4abcda66aec32 > change-id: 20241127-gs101-phy-lanes-orientation-phy-29d20c6d84d2 > > Best regards, > -- > André Draszik <andre.draszik@xxxxxxxxxx> > Thanks Andre for getting this working! I've tested this on my Pixel 6 Pro. I was able to verify runtime PM works in both orientations with high-speed, super-speed, and super-speed-plus. Feel free to include: Tested-by: Will McVicker <willmcvicker@xxxxxxxxxx> Thanks, Will
