Hello Rob, > -----Original Message----- > From: sunyeal.hong <sunyeal.hong@xxxxxxxxxxx> > Sent: Thursday, July 25, 2024 10:24 AM > To: 'Rob Herring' <robh@xxxxxxxxxx> > Cc: 'Krzysztof Kozlowski' <krzk@xxxxxxxxxx>; 'Sylwester Nawrocki' > <s.nawrocki@xxxxxxxxxxx>; 'Chanwoo Choi' <cw00.choi@xxxxxxxxxxx>; 'Alim > Akhtar' <alim.akhtar@xxxxxxxxxxx>; 'Michael Turquette' > <mturquette@xxxxxxxxxxxx>; 'Stephen Boyd' <sboyd@xxxxxxxxxx>; 'Conor > Dooley' <conor+dt@xxxxxxxxxx>; linux-samsung-soc@xxxxxxxxxxxxxxx; linux- > clk@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-arm- > kernel@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx > Subject: RE: [PATCH v4 1/4] dt-bindings: clock: add ExynosAuto v920 SoC > CMU bindings > > Hello Rob, > > > -----Original Message----- > > From: Rob Herring <robh@xxxxxxxxxx> > > Sent: Wednesday, July 24, 2024 5:57 AM > > To: Sunyeal Hong <sunyeal.hong@xxxxxxxxxxx> > > Cc: Krzysztof Kozlowski <krzk@xxxxxxxxxx>; Sylwester Nawrocki > > <s.nawrocki@xxxxxxxxxxx>; Chanwoo Choi <cw00.choi@xxxxxxxxxxx>; Alim > > Akhtar <alim.akhtar@xxxxxxxxxxx>; Michael Turquette > > <mturquette@xxxxxxxxxxxx>; Stephen Boyd <sboyd@xxxxxxxxxx>; Conor > > Dooley <conor+dt@xxxxxxxxxx>; linux-samsung-soc@xxxxxxxxxxxxxxx; > > linux- clk@xxxxxxxxxxxxxxx; devicetree@xxxxxxxxxxxxxxx; linux-arm- > > kernel@xxxxxxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx > > Subject: Re: [PATCH v4 1/4] dt-bindings: clock: add ExynosAuto v920 > > SoC CMU bindings > > > > On Tue, Jul 23, 2024 at 07:33:30AM +0900, Sunyeal Hong wrote: > > > Add dt-schema for ExynosAuto v920 SoC clock controller. > > > Add device tree clock binding definitions for below CMU blocks. > > > > > > - CMU_TOP > > > - CMU_PERIC0 > > > > > > Signed-off-by: Sunyeal Hong <sunyeal.hong@xxxxxxxxxxx> > > > --- > > > .../clock/samsung,exynosautov920-clock.yaml | 115 +++++++++++ > > > .../clock/samsung,exynosautov920.h | 191 ++++++++++++++++++ > > > 2 files changed, 306 insertions(+) > > > create mode 100644 > > > Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock > > > .y > > > aml create mode 100644 > > > include/dt-bindings/clock/samsung,exynosautov920.h > > > > > > diff --git > > > a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clo > > > ck > > > .yaml > > > b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clo > > > ck > > > .yaml > > > new file mode 100644 > > > index 000000000000..90f9f17da959 > > > --- /dev/null > > > +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov920 > > > +++ -c > > > +++ lock.yaml > > > @@ -0,0 +1,115 @@ > > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > > > +--- > > > +$id: > > > +https://protect2.fireeye.com/v1/url?k=9932a88e-c6ae81a4-993323c1-00 > > > +0b > > > +abe598f7-779f1e959ac8eab9&q=1&e=539edfa4-b4e4-460a-93f4-1e6f1703094 > > > +5& > > > +u=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fclock%2Fsamsung%2Cexynosa > > > +ut > > > +ov920-clock.yaml%23 > > > +$schema: > > > +https://protect2.fireeye.com/v1/url?k=4dbf6fb9-12234693-4dbee4f6-00 > > > +0b > > > +abe598f7-363a2f64c69b9542&q=1&e=539edfa4-b4e4-460a-93f4-1e6f1703094 > > > +5& > > > +u=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23 > > > + > > > +title: Samsung ExynosAuto v920 SoC clock controller > > > + > > > +maintainers: > > > + - Sunyeal Hong <sunyeal.hong@xxxxxxxxxxx> > > > + - Chanwoo Choi <cw00.choi@xxxxxxxxxxx> > > > + - Krzysztof Kozlowski <krzk@xxxxxxxxxx> > > > + - Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx> > > > + > > > +description: | > > > + ExynosAuto v920 clock controller is comprised of several CMU > > > +units, generating > > > + clocks for different domains. Those CMU units are modeled as > > > +separate device > > > + tree nodes, and might depend on each other. Root clocks in that > > > +clock tree are > > > + two external clocks:: OSCCLK/XTCXO (38.4 MHz) and RTCCLK/XrtcXTI > > (32768 Hz). > > > + The external OSCCLK must be defined as fixed-rate clock in dts. > > > + > > > + CMU_TOP is a top-level CMU, where all base clocks are prepared > > > + using PLLs and dividers; all other clocks of function blocks > > > + (other > > > + CMUs) are usually derived from CMU_TOP. > > > + > > > + Each clock is assigned an identifier and client nodes can use > > > + this identifier to specify the clock which they consume. All > > > + clocks available for usage in clock consumer nodes are defined as > > > + preprocessor macros in 'include/dt- > > bindings/clock/samsung,exynosautov920.h' header. > > > + > > > +properties: > > > + compatible: > > > + enum: > > > + - samsung,exynosautov920-cmu-top > > > + - samsung,exynosautov920-cmu-peric0 > > > + > > > + clocks: > > > + minItems: 1 > > > + maxItems: 3 > > > + > > > + clock-names: > > > + minItems: 1 > > > + maxItems: 3 > > > > Move the descriptions and names here. Then in the if/then schemas just > > set the number of items to 1 or 3 as appropriate. > > > > Rob > > Thank you for your review. I will update by reflecting the fixes. > > Thanks, > Sunyeal Hong > > I faced a new problem after modifying it as you reviewed. For example, if I declare a new cmu block that uses only osclk and noc to dt, it seems that a problem occurs in check dtb. - yaml properties: compatible: enum: - samsung,exynosautov920-cmu-top - samsung,exynosautov920-cmu-peric0 - samsung,exynosautov920-cmu-misc clocks: minItems: 1 items: - description: External reference clock (38.4 MHz) - description: Block IP clock (from CMU_TOP) - description: Block NOC clock (from CMU_TOP) clock-names: minItems: 1 items: - const: oscclk - const: ip - const: noc - dts cmu_misc: clock-controller@10020000 { compatible = "samsung,exynosautov920-cmu-misc"; reg = <0x10020000 0x8000>; #clock-cells = <1>; clocks = <&xtcxo>, <&cmu_top DOUT_CLKCMU_MISC_NOC>; clock-names = "oscclk", "noc"; }; In this case, can you tell me how to handle it? And if a new clock item is added and a new cmu block uses only the clock item added and oscclk, a problem may occur. Thanks, Sunyeal Hong.
