Hello Jaewon, > -----Original Message----- > From: Jaewon Kim <jaewon02.kim@xxxxxxxxxxx> > Sent: Friday, July 5, 2024 6:47 PM > To: Sunyeal Hong <sunyeal.hong@xxxxxxxxxxx>; Krzysztof Kozlowski > <krzk@xxxxxxxxxx>; Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx>; Chanwoo > Choi <cw00.choi@xxxxxxxxxxx>; Alim Akhtar <alim.akhtar@xxxxxxxxxxx>; > Michael Turquette <mturquette@xxxxxxxxxxxx>; Stephen Boyd > <sboyd@xxxxxxxxxx> > Cc: linux-samsung-soc@xxxxxxxxxxxxxxx; linux-clk@xxxxxxxxxxxxxxx; linux- > kernel@xxxxxxxxxxxxxxx > Subject: Re: [PATCH 1/5] dt-bindings: clock: add Exynos Auto v920 SoC CMU > bindings > > Hi Sunyeal, > > > On 7/5/24 11:11, Sunyeal Hong wrote: > > Add dt-schema for Exynos Auto v920 SoC clock controller. > > > > Signed-off-by: Sunyeal Hong <sunyeal.hong@xxxxxxxxxxx> > > --- > > .../clock/samsung,exynosautov920-clock.yaml | 115 ++++++++++++++++++ > > 1 file changed, 115 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.y > > aml > > > > diff --git > > a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock > > .yaml > > b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock > > .yaml > > new file mode 100644 > > index 000000000000..3e5e408c8336 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-c > > +++ lock.yaml > > @@ -0,0 +1,115 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 > > +--- > > +$id: > > +https://protect2.fireeye.com/v1/url?k=804ccde6-e1c7d8c9-804d46a9-74fe > > +485cbfe7-c44fcfa897bd4340&q=1&e=65af0c33-026a-42d4-92cd-09b6c91c9bfb& > > +u=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fclock%2Fsamsung%2Cexynosaut > > +ov920-clock.yaml%23 > > +$schema: > > +https://protect2.fireeye.com/v1/url?k=8a40f68c-ebcbe3a3-8a417dc3-74fe > > +485cbfe7-63f39e48f537ca7e&q=1&e=65af0c33-026a-42d4-92cd-09b6c91c9bfb& > > +u=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23 > > + > > +title: Samsung Exynos Auto v920 SoC clock controller > > + > > +maintainers: > > + - Sunyeal Hong <sunyeal.hong@xxxxxxxxxxx> > > + - Chanwoo Choi <cw00.choi@xxxxxxxxxxx> > > + - Krzysztof Kozlowski <krzk@xxxxxxxxxx> > > + - Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx> > > + > > +description: | > > + Exynos Auto v920 clock controller is comprised of several CMU > > +units, generating > > + clocks for different domains. Those CMU units are modeled as > > +separate device > > + tree nodes, and might depend on each other. Root clocks in that > > +clock tree are > > + two external clocks:: OSCCLK/XTCXO (38.4 MHz) and RTCCLK/XrtcXTI > (32768 Hz). > > + The external OSCCLK must be defined as fixed-rate clock in dts. > > + > > + CMU_TOP is a top-level CMU, where all base clocks are prepared > > + using PLLs and dividers; all other clocks of function blocks (other > > + CMUs) are usually derived from CMU_TOP. > > + > > + Each clock is assigned an identifier and client nodes can use this > > + identifier to specify the clock which they consume. All clocks > > + available for usage in clock consumer nodes are defined as > > + preprocessor macros in 'include/dt- > bindings/clock/samsung,exynosautov920.h' header. > > + > > +properties: > > + compatible: > > + enum: > > + - samsung,exynosautov920-cmu-top > > + - samsung,exynosautov920-cmu-peric0 > > + > > + clocks: > > + minItems: 1 > > + maxItems: 3 > > + > > + clock-names: > > + minItems: 1 > > + maxItems: 3 > > + > > + "#clock-cells": > > + const: 1 > > + > > + reg: > > + maxItems: 1 > > + > > +allOf: > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: samsung,exynosautov920-cmu-top > > + > > + then: > > + properties: > > + clocks: > > + items: > > + - description: External reference clock (38.4 MHz) > > + > > + clock-names: > > + items: > > + - const: oscclk > > + > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: samsung,exynosautov920-cmu-peric0 > > + > > + then: > > + properties: > > + clocks: > > + items: > > + - description: External reference clock (38.4 MHz) > > + - description: CMU_PERIC0 NOC clock (from CMU_TOP) > > + - description: CMU_PERIC0 IP clock (from CMU_TOP) > > + > > + clock-names: > > + items: > > + - const: oscclk > > + - const: dout_clkcmu_peric0_noc > > + - const: dout_clkcmu_peric0_ip > > + > > +required: > > + - compatible > > + - "#clock-cells" > > + - clocks > > + - clock-names > > + - reg > > + > > +additionalProperties: false > > + > > +examples: > > + # Clock controller node for CMU_PERIC0 > > + - | > > + #include <dt-bindings/clock/samsung,exynosautov920.h> > > + > > + cmu_peric0: clock-controller@10800000 { > > + compatible = "samsung,exynosautov920-cmu-peric0"; > > + reg = <0x10800000 0x8000>; > > + #clock-cells = <1>; > > + > > + clocks = <&xtcxo>, > > + <&cmu_top DOUT_CLKCMU_PERIC0_NOC>, > > + <&cmu_top DOUT_CLKCMU_PERIC0_IP>; > > + clock-names = "oscclk", > > + "dout_clkcmu_peric0_noc", > > + "dout_clkcmu_peric0_ip"; > > There was a review with clock name. > Please consider modifying the clock-name by referring to the review below. > https://lore.kernel.org/linux-samsung-soc/20231220150726.GA223267- > robh@xxxxxxxxxx/ > > > + }; > > + > > +... > > Thanks > Jaewon Kim > I checked the review you shared and will apply it to my patch. Thanks, Sunyeal Hong