On 20/06/2024 12:34, Vishnu Reddy wrote:
> gpiolib framework has the implementation of setting up the
> PUD configuration for GPIO pins but there is no driver support.
>
> Add support to handle the PUD configuration request from the
> userspace in samsung pinctrl driver.
>
> Signed-off-by: Vishnu Reddy <vishnu.reddy@xxxxxxxxxxx>
> ---
> Verified the offset from the user manual of following Exynos SoC series
> and found the current code is taking care of correct offset for pull-up
> and pull-down
>
> Exynos-3250
> Exynos-3470
> Exynos-4412
> Exynos-4415
> Exynos-5250
> Exynos-5260
> Exynos-5410
> Exynos-5420
> Exynos-5422
> Exynos-7420
> Exynos-7580
> Exynos-7880
> Exynos-9820
> Exynos-9830
> Exynos-4210
> Exynos-S5PC210
> Exynos-S5PV310
>
> This patch is tested on FSD platform
You verified but...
> diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h
> index d50ba6f07d5d..758b623a4bea 100644
> --- a/drivers/pinctrl/samsung/pinctrl-samsung.h
> +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h
> @@ -61,6 +61,13 @@ enum pincfg_type {
> #define PIN_CON_FUNC_INPUT 0x0
> #define PIN_CON_FUNC_OUTPUT 0x1
>
> +/*
> + * Values for the pin PUD register.
> + */
> +#define PIN_PUD_PULL_UP_DOWN_DISABLE 0x0
> +#define PIN_PUD_PULL_DOWN_ENABLE 0x1
> +#define PIN_PUD_PULL_UP_ENABLE 0x3
... I said it is not correct, so you send the same? If you think I was
wrong, then please respond and keep discussion going. Sending the same
suggests you just ignored my comment.
Look at two headers s5pv210-pinctrl.h and s3c64xx-pinctrl.h. How did you
resolve these?
Best regards,
Krzysztof
