On 06/17/2024, André Draszik wrote: > This patch series adds support for the Exynos USB 3.1 DRD combo phy, as > found in Exynos 9 SoCs like Google GS101. It supports USB SS, HS and > DisplayPort, but DisplayPort is out of scope for this series. > > In terms of UTMI+, this is very similar to the existing Exynos850 > support in this driver. The difference is that it supports both UTMI+ > (HS) and PIPE3 (SS). Firstly, there are some preparatory patches to convert > this driver to using the clk_bulk and regulator_bulk APIs to simplify > addition, while the bulk of the changes is around the SS part. > > Dependencies on other patches: > While there is no compile or link time dependency, for USB to actually work > this series also requires Peter's syscon changes from > https://lore.kernel.org/all/20240614140421.3172674-1-peter.griffin@xxxxxxxxxx/ > > To: Vinod Koul <vkoul@xxxxxxxxxx> > To: Kishon Vijay Abraham I <kishon@xxxxxxxxxx> > To: Rob Herring <robh@xxxxxxxxxx> > To: Krzysztof Kozlowski <krzk+dt@xxxxxxxxxx> > To: Conor Dooley <conor+dt@xxxxxxxxxx> > To: Peter Griffin <peter.griffin@xxxxxxxxxx> > To: Marek Szyprowski <m.szyprowski@xxxxxxxxxxx> > To: Sylwester Nawrocki <s.nawrocki@xxxxxxxxxxx> > To: Alim Akhtar <alim.akhtar@xxxxxxxxxxx> > To: Sam Protsenko <semen.protsenko@xxxxxxxxxx> > Cc: Krzysztof Kozlowski <krzk@xxxxxxxxxx> > Cc: Tudor Ambarus <tudor.ambarus@xxxxxxxxxx> > Cc: Will McVicker <willmcvicker@xxxxxxxxxx> > Cc: Roy Luo <royluo@xxxxxxxxxx> > Cc: kernel-team@xxxxxxxxxxx > Cc: linux-phy@xxxxxxxxxxxxxxxxxxx > Cc: devicetree@xxxxxxxxxxxxxxx > Cc: linux-kernel@xxxxxxxxxxxxxxx > Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx > Cc: linux-samsung-soc@xxxxxxxxxxxxxxx > Signed-off-by: André Draszik <andre.draszik@xxxxxxxxxx> > > Changes in v3: > - drop patch 'phy: exynos5-usbdrd: use exynos_get_pmu_regmap_by_phandle() > for PMU regs'. This is not needed anymore with Peter's syscon series > mentioned above (Krzysztof). > - drop those patches that have already been merged via > https://lore.kernel.org/all/20240507-samsung-usb-phy-fixes-v1-0-4ccba5afa7cc@xxxxxxxxxx/ > - update device tree binding 'reg-names' (Krzysztof) > - use clk_bulk and regulator_bulk APIs throughout to simplify addition of > gs101 support as preparatory patches > - patch 1: add required but missing regulators > - patch 4: > * make the register access clock name(s) platform specific and avoid > use of devm_clk_bulk_get_optional() as we want to be sure to have > retrieved all required clocks > * fix a whitespace issue > * slightly rephrase commit message > - patch 6: > * set unused callback pointers to NULL in gs101_tunes[] > * implement missing regulator support and enable power to phy before any > register access > * add more phy tunes > * move PTS_UTMI_POSTINIT utmi phy tuning to before completion of POR > sequence, as per datasheet > * group gs101 related symbols closer to each other > - Link to v2: https://lore.kernel.org/r/20240501-usb-phy-gs101-v2-0-ed9f14a1bd6d@xxxxxxxxxx > > Changes in v2: > - avoid having nested else/if in the DT binding (Rob) > - add missing bitfield.h include > - Link to v1: https://lore.kernel.org/r/20240423-usb-phy-gs101-v1-0-ebdcb3ac174d@xxxxxxxxxx > > --- > André Draszik (6): > dt-bindings: phy: samsung,usb3-drd-phy: add gs101 compatible > phy: exynos5-usbdrd: support isolating HS and SS ports independently > phy: exynos5-usbdrd: convert core clocks to clk_bulk > phy: exynos5-usbdrd: convert (phy) register access clock to clk_bulk > phy: exynos5-usbdrd: convert Vbus supplies to regulator_bulk > phy: exynos5-usbdrd: support Exynos USBDRD 3.1 combo phy (HS & SS) > > .../bindings/phy/samsung,usb3-drd-phy.yaml | 77 +- > drivers/phy/samsung/phy-exynos5-usbdrd.c | 958 +++++++++++++++++---- > include/linux/soc/samsung/exynos-regs-pmu.h | 4 + > 3 files changed, 893 insertions(+), 146 deletions(-) > --- > base-commit: 6906a84c482f098d31486df8dc98cead21cce2d0 > change-id: 20240423-usb-phy-gs101-abf3e172d1c4 > > Best regards, > -- > André Draszik <andre.draszik@xxxxxxxxxx> > Thanks Andre! I tested this out on my Pixel 6 Pro. I verified the USB modules load and probe as expected. I also verified my device is detected via adb on my host machine. However, occasionally when I boot from RAM the device doesn't come up via adb compared to when I flash and run `fastboot reboot`. So there must be something happening differently when booting from fastboot mode versus a reboot. Specifically, when I flash the kernel and run `fastboot reboot`, adb has always come up, but booting the kernel from RAM results in about 30% adb detection fail rate. I'll keep an eye on this. $ adb shell lsmod Module Size Used by at24 24576 0 dwc3_exynos 12288 0 i2c_exynos5 28672 0 ufs_exynos 32768 0 phy_exynos_ufs 20480 1 phy_exynos5_usbdrd 36864 2 s3c2410_wdt 24576 0 arm_dsu_pmu 24576 0 Thanks, Will
