On 18/06/2024 22:45, Sam Protsenko wrote: > Some SoCs like Exynos850 might require the SSS bus clock (PCLK) to be > enabled in order to access TRNG registers. Add and handle the optional > PCLK clock accordingly to make it possible. > > Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx> > --- Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
