On Wed, Jun 12, 2024 at 12:51 PM Vinod Koul <vkoul@xxxxxxxxxx> wrote: > > > On Tue, 07 May 2024 15:14:43 +0100, André Draszik wrote: > > Before coming to an agreement on my Samsung USB31 / gs101 phy changes [1] > > [2], I decided to split out those changes from that series which can also be > > applied independently and add a few additional fixes I had lying around. > > > > This contains mostly cleanup, but also a change to using fsleep() as > > recommended by the timers-howto, and a fix for setting the ref frequency for > > E850. > > > > [...] > > Applied, thanks! > > [1/5] phy: exynos5-usbdrd: uniform order of register bit macros > commit: 2a0dc34bab8ede5fa50378ef206f580303eed8de > [2/5] phy: exynos5-usbdrd: convert udelay() to fsleep() > commit: 27f3d3f6d87f650cc6b3ea08335dea749f1b04aa > [3/5] phy: exynos5-usbdrd: make phy_isol() take a bool for clarity > commit: f2b6fc4d5c9793c556412e9a8ac122670a0d8dcb > [4/5] phy: exynos5-usbdrd: fix definition of EXYNOS5_FSEL_26MHZ > commit: 32b2495e731f2a56118034e9c665e6fe56bbfe3a > [5/5] phy: exynos5-usbdrd: set ref clk freq in exynos850_usbdrd_utmi_init() > commit: d14c14618e851eb25d55807810c2c1791a637712 > Did somebody actually test it on Exynos850? > Best regards, > -- > Vinod Koul <vkoul@xxxxxxxxxx> >
