Hi Krzysztof, Thank you for reviewing the patch. > -----Original Message----- > From: Krzysztof Kozlowski [mailto:krzk@xxxxxxxxxx] > Sent: 01 June 2024 21:41 > To: Vishnu Reddy <vishnu.reddy@xxxxxxxxxxx>; > s.nawrocki@xxxxxxxxxxx; alim.akhtar@xxxxxxxxxxx; > linus.walleij@xxxxxxxxxx > Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx; linux-samsung- > soc@xxxxxxxxxxxxxxx; linux-gpio@xxxxxxxxxxxxxxx; linux- > kernel@xxxxxxxxxxxxxxx; pankaj.dubey@xxxxxxxxxxx; > ravi.patel@xxxxxxxxxxx > Subject: Re: [PATCH] pinctrl: samsung: Add support for pull-up and pull-down > > On 29/05/2024 08:59, Vishnu Reddy wrote: > > gpiolib framework has the implementation of setting up the PUD > > configuration for GPIO pins but there is no driver support. > > > > Add support to handle the PUD configuration request from the userspace > > in samsung pinctrl driver. > > > > Signed-off-by: Vishnu Reddy <vishnu.reddy@xxxxxxxxxxx> > > --- > > drivers/pinctrl/samsung/pinctrl-samsung.c | 51 > > +++++++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-samsung.h > | > > 7 ++++ > > Please work on latest mainline or next branches. This was based on some > older tree. Ack, Will work on 'krzk/for-next' branch. > > > > 2 files changed, 58 insertions(+) > > > > diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c > > b/drivers/pinctrl/samsung/pinctrl-samsung.c > > index ed07e23e0912..a4b6eea5e168 100644 > > --- a/drivers/pinctrl/samsung/pinctrl-samsung.c > > +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c > > @@ -939,6 +939,56 @@ static int samsung_pinctrl_unregister(struct > platform_device *pdev, > > return 0; > > } > > > > +/* > > + * samsung_gpio_set_pud will enable or disable the pull-down and > > + * pull-up for the gpio pins in the PUD register. > > + */ > > +static void samsung_gpio_set_pud(struct gpio_chip *gc, unsigned int > offset, > > + unsigned int value) > > +{ > > + struct samsung_pin_bank *bank = gpiochip_get_data(gc); > > + const struct samsung_pin_bank_type *type = bank->type; > > + void __iomem *reg; > > + unsigned int data; > > + > > + reg = bank->pctl_base + bank->pctl_offset; > > + data = readl(reg + type->reg_offset[PINCFG_TYPE_PUD]); > > + data &= ~(0xf << (offset * 4)); > > + data |= value << (offset * 4); > > + writel(data, reg + type->reg_offset[PINCFG_TYPE_PUD]); > > +} > > + > > +/* > > + * samsung_gpio_set_config will identify the type of PUD config based > > + * on the gpiolib request to enable or disable the PUD configuration. > > + */ > > +static int samsung_gpio_set_config(struct gpio_chip *gc, unsigned int > offset, > > + unsigned long config) > > +{ > > + struct samsung_pin_bank *bank = gpiochip_get_data(gc); > > + unsigned long flags; > > + unsigned int value = 0; > > + > > + switch (pinconf_to_config_param(config)) { > > + case PIN_CONFIG_BIAS_DISABLE: > > + value = DISABLE_PIN_PULL_UP_DOWN; > > + break; > > + case PIN_CONFIG_BIAS_PULL_DOWN: > > + value = ENABLE_PIN_PULL_DOWN; > > + break; > > + case PIN_CONFIG_BIAS_PULL_UP: > > + value = ENABLE_PIN_PULL_UP; > > + break; > > + default: > > + return -ENOTSUPP; > > + } > > + > > Missing clock. Sorry, I didn't get your point exactly. Could you please elaborate? > > > + raw_spin_lock_irqsave(&bank->slock, flags); > > + samsung_gpio_set_pud(gc, offset, value); > > + raw_spin_unlock_irqrestore(&bank->slock, flags); > > Blank line Ack, Will update. > > > + return 0; > > +} > > + > > static const struct gpio_chip samsung_gpiolib_chip = { > > .request = gpiochip_generic_request, > > .free = gpiochip_generic_free, > > @@ -948,6 +998,7 @@ static const struct gpio_chip samsung_gpiolib_chip = > { > > .direction_output = samsung_gpio_direction_output, > > .to_irq = samsung_gpio_to_irq, > > .add_pin_ranges = samsung_add_pin_ranges, > > + .set_config = samsung_gpio_set_config, > > .owner = THIS_MODULE, > > }; > > > > diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h > > b/drivers/pinctrl/samsung/pinctrl-samsung.h > > index ab791afaabf5..23b70ddcaccc 100644 > > --- a/drivers/pinctrl/samsung/pinctrl-samsung.h > > +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h > > @@ -61,6 +61,13 @@ enum pincfg_type { > > #define PIN_CON_FUNC_INPUT 0x0 > > #define PIN_CON_FUNC_OUTPUT 0x1 > > > > +/* > > + * Values for the pin PUD register. > > + */ > > +#define DISABLE_PIN_PULL_UP_DOWN 0x0 > > +#define ENABLE_PIN_PULL_DOWN 0x1 > > +#define ENABLE_PIN_PULL_UP 0x3 > > This does not look right. The value is 0x2 for s3c and s5p. I received exynos manuals. I'll check and I'll update. > > > > Best regards, > Krzysztof
