Hi Krzysztof, This series contains the dts, dtsi that enables UFS on Pixel 6 (Oriole). >From v3 onwards it has been split into separate series as you requested. v5 has been rebased on next-20240430, to avoid the conflicts with Andre's USB enablement work that was recently queued. Along with the various driver code UFS is now functional, the SKhynix HN8T05BZGKX015 can be enumerated, partitions mounted etc. UFS bindings in this series are proposed: https://lore.kernel.org/linux-arm-kernel/20240426122004.2249178-1-peter.griffin@xxxxxxxxxx/ * Clock cmu_hsi2 bindings used here are already queued by you * UFS phy bindings used here are already queued by Vinod kind regards, Peter. lore v4: https://lore.kernel.org/linux-kernel/20240429111537.2369227-4-peter.griffin@xxxxxxxxxx/T/ lore v3: https://lore.kernel.org/lkml/20240426122004.2249178-1-peter.griffin@xxxxxxxxxx/ lore v2: https://lore.kernel.org/linux-kernel/20240423205006.1785138-1-peter.griffin@xxxxxxxxxx/ lore v1: https://lore.kernel.org/linux-clk/20240404122559.898930-1-peter.griffin@xxxxxxxxxx/ Changes since v4: - Rebase on next-20240430 - Drop '0x' from unit address (Krzysztof) Changes since v3: - Fix unit address ordering in gs101.dtsi (Krzysztof) Changes since v2: - Split into separate subsystem series - Split dts and dtsi patches (Krzysztof) Changes since v1: - Collect up tags - fix google,gs101-hsi2-sysreg size (0x10000 not 0x1000) (Andre) - use GPIO defines in DT and add TODO pmic comment (Krzysztof) - Add sysreg clock to ufs node (Andre) Peter Griffin (3): arm64: dts: exynos: gs101: Add the hsi2 sysreg node arm64: dts: exynos: gs101: Add ufs and ufs-phy dt nodes arm64: dts: exynos: gs101: enable ufs, phy on oriole & define ufs regulator .../boot/dts/exynos/google/gs101-oriole.dts | 18 ++++++++ arch/arm64/boot/dts/exynos/google/gs101.dtsi | 42 +++++++++++++++++++ 2 files changed, 60 insertions(+) -- 2.45.0.rc0.197.gbae5840b3b-goog
