On Thu, Mar 28, 2024 at 4:14 AM Jaewon Kim <jaewon02.kim@xxxxxxxxxxx> wrote:
>
> All PLL id values of CMU_TOP were incorrectly set to FOUT_SHARED0_PLL.
> It modified to the correct PLL clock id value.
>
> Fixes: 6587c62f69dc ("clk: samsung: add top clock support for Exynos Auto v9 SoC")
> Signed-off-by: Jaewon Kim <jaewon02.kim@xxxxxxxxxxx>
> ---
Reviewed-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx>
> drivers/clk/samsung/clk-exynosautov9.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/clk/samsung/clk-exynosautov9.c b/drivers/clk/samsung/clk-exynosautov9.c
> index e9c06eb93e66..f04bacacab2c 100644
> --- a/drivers/clk/samsung/clk-exynosautov9.c
> +++ b/drivers/clk/samsung/clk-exynosautov9.c
> @@ -352,13 +352,13 @@ static const struct samsung_pll_clock top_pll_clks[] __initconst = {
> /* CMU_TOP_PURECLKCOMP */
> PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared0_pll", "oscclk",
> PLL_LOCKTIME_PLL_SHARED0, PLL_CON3_PLL_SHARED0, NULL),
> - PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared1_pll", "oscclk",
> + PLL(pll_0822x, FOUT_SHARED1_PLL, "fout_shared1_pll", "oscclk",
> PLL_LOCKTIME_PLL_SHARED1, PLL_CON3_PLL_SHARED1, NULL),
> - PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared2_pll", "oscclk",
> + PLL(pll_0822x, FOUT_SHARED2_PLL, "fout_shared2_pll", "oscclk",
> PLL_LOCKTIME_PLL_SHARED2, PLL_CON3_PLL_SHARED2, NULL),
> - PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared3_pll", "oscclk",
> + PLL(pll_0822x, FOUT_SHARED3_PLL, "fout_shared3_pll", "oscclk",
> PLL_LOCKTIME_PLL_SHARED3, PLL_CON3_PLL_SHARED3, NULL),
> - PLL(pll_0822x, FOUT_SHARED0_PLL, "fout_shared4_pll", "oscclk",
> + PLL(pll_0822x, FOUT_SHARED4_PLL, "fout_shared4_pll", "oscclk",
> PLL_LOCKTIME_PLL_SHARED4, PLL_CON3_PLL_SHARED4, NULL),
> };
>
> --
> 2.43.2
>
>
