On Sat, 24 Feb 2024 14:20:50 -0600, Sam Protsenko wrote:
> Implement CPU clock control for Exynos850 SoC. It follows the same
> procedure which is already implemented for other SoCs in clk-cpu.c:
>
> 1. Set the correct rate for the alternate parent (if needed) before
> switching to use it as the CPU clock
> 2. Switch to the alternate parent, so the CPU continues to get clocked
> while the PLL is being re-configured
> 3. Adjust the dividers for the CPU related buses (ACLK, ATCLK, etc)
> 4. Re-configure the PLL for the new CPU clock rate. It's done
> automatically, as the CPU clock rate change propagates to the PLL
> clock, because the CPU clock has CLK_SET_RATE_PARENT flag set in
> exynos_register_cpu_clock()
> 5. Once the PLL is locked, set it back as the CPU clock source
> 6. Set alternate parent clock rate back to max speed
>
> [...]
Applied, thanks!
[12/15] clk: samsung: Add CPU clock support for Exynos850
https://git.kernel.org/krzk/linux/c/61f4399c74d0677ee64e42f7b8d4ab01ee39de45
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
