On Sat, 24 Feb 2024 14:20:45 -0600, Sam Protsenko wrote:
> The documentation for struct exynos_cpuclk says .ctrl_base field should
> contain the controller base address. There are two different problems
> with that:
>
> 1. All Exynos clock drivers are actually passing CPU_SRC register offset
> via CPU_CLK() macro, which in turn gets assigned to mentioned
> .ctrl_base field. Because CPU_SRC register usually already has 0x200
> offset from controller's base, all other register offsets in
> clk-cpu.c (like DIVs and MUXes) are specified as offsets from CPU_SRC
> offset, and not from controller's base. That makes things confusing
> and inconsistent with register offsets provided in Exynos clock
> drivers, also breaking the contract for .ctrl_base field as described
> in struct exynos_cpuclk doc.
>
> [...]
Applied, thanks!
[07/15] clk: samsung: Pass actual CPU clock registers base to CPU_CLK()
https://git.kernel.org/krzk/linux/c/338f1c25269185cbea6e3dd966e5c859af2323f7
Best regards,
--
Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx>
