On Thu, 8 Feb 2024 at 16:21, Peter Griffin <peter.griffin@xxxxxxxxxx> wrote: > > Some Exynos based SoCs like Tensor gs101 protect the PMU registers for > security hardening reasons so that they are only write accessible in el3 > via an SMC call. > > As most Exynos drivers that need to write PMU registers currently obtain a > regmap via syscon (phys, pinctrl, watchdog). Support for the above usecase > is implemented in this driver using a custom regmap similar to syscon to > handle the SMC call. Platforms that don't secure PMU registers, get a mmio > regmap like before. As regmaps abstract out the underlying register access > changes to the leaf drivers are minimal. > > A new API exynos_get_pmu_regmap_by_phandle() is provided for leaf drivers > that currently use syscon_regmap_lookup_by_phandle(). This also handles > deferred probing. > > Signed-off-by: Peter Griffin <peter.griffin@xxxxxxxxxx> Tested-by: Alexey Klimov <alexey.klimov@xxxxxxxxxx> Apparently it seems tested-by should be provided for both patches. This was also tested on odroid xu3 and I also have WIP code that depends on this SMC-based regmap. No issues are observed and behaves as expected. > --- > Changes since v3: > - Fix PMUALIVE_MASK > - Add TENSOR_ prefix > - clear SET_BITS bits on each loop iteration > - change set_bit to set_bits in func name > - Fix some alignment > - Add missing return on dev_err_probe > - Reduce indentation in loop I no longer see the compilation warning related to struct device_node declared inside parameter list with v4, I guess one line change addition in exynos-pmu.h does the job. Thank you! BR, Alexey
