Add initial board support for the Pixel 6 phone code named Oriole. This has been tested with a minimal busybox initramfs and boots to a shell. Tested-by: Will McVicker <willmcvicker@xxxxxxxxxx> Reviewed-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx> Signed-off-by: Peter Griffin <peter.griffin@xxxxxxxxxx> --- arch/arm64/boot/dts/exynos/Makefile | 2 + arch/arm64/boot/dts/exynos/google/Makefile | 4 + .../boot/dts/exynos/google/gs101-oriole.dts | 105 ++++++++++++++++++ 3 files changed, 111 insertions(+) create mode 100644 arch/arm64/boot/dts/exynos/google/Makefile create mode 100644 arch/arm64/boot/dts/exynos/google/gs101-oriole.dts diff --git a/arch/arm64/boot/dts/exynos/Makefile b/arch/arm64/boot/dts/exynos/Makefile index 6e4ba69268e5..44c24a8ad9e1 100644 --- a/arch/arm64/boot/dts/exynos/Makefile +++ b/arch/arm64/boot/dts/exynos/Makefile @@ -1,4 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 +subdir-y += google + dtb-$(CONFIG_ARCH_EXYNOS) += \ exynos5433-tm2.dtb \ exynos5433-tm2e.dtb \ diff --git a/arch/arm64/boot/dts/exynos/google/Makefile b/arch/arm64/boot/dts/exynos/google/Makefile new file mode 100644 index 000000000000..0a6d5e1fe4ee --- /dev/null +++ b/arch/arm64/boot/dts/exynos/google/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 + +dtb-$(CONFIG_ARCH_EXYNOS) += \ + gs101-oriole.dtb \ diff --git a/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts new file mode 100644 index 000000000000..ce087ee1fd4d --- /dev/null +++ b/arch/arm64/boot/dts/exynos/google/gs101-oriole.dts @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Oriole Device Tree + * + * Copyright 2021-2023 Google LLC + * Copyright 2023 Linaro Ltd - <peter.griffin@xxxxxxxxxx> + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include "gs101-pinctrl.h" +#include "gs101.dtsi" + +/ { + model = "Oriole"; + compatible = "google,gs101-oriole", "google,gs101"; + + aliases { + serial0 = &serial_0; + }; + + chosen { + /* Bootloader expects bootargs specified otherwise it crashes */ + bootargs = ""; + stdout-path = &serial_0; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&key_voldown>, <&key_volup>, <&key_power>; + + button-vol-down { + label = "KEY_VOLUMEDOWN"; + linux,code = <KEY_VOLUMEDOWN>; + gpios = <&gpa7 3 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + + button-vol-up { + label = "KEY_VOLUMEUP"; + linux,code = <KEY_VOLUMEUP>; + gpios = <&gpa8 1 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + + button-power { + label = "KEY_POWER"; + linux,code = <KEY_POWER>; + gpios = <&gpa10 1 GPIO_ACTIVE_LOW>; + wakeup-source; + }; + }; +}; + +&ext_24_5m { + clock-frequency = <24576000>; +}; + +&ext_200m { + clock-frequency = <200000000>; +}; + +&pinctrl_far_alive { + key_voldown: key-voldown-pins { + samsung,pins = "gpa7-3"; + samsung,pin-function = <GS101_PIN_FUNC_EINT>; + samsung,pin-pud = <GS101_PIN_PULL_NONE>; + samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>; + }; + + key_volup: key-volup-pins { + samsung,pins = "gpa8-1"; + samsung,pin-function = <GS101_PIN_FUNC_EINT>; + samsung,pin-pud = <GS101_PIN_PULL_NONE>; + samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>; + }; +}; + +&pinctrl_gpio_alive { + key_power: key-power-pins { + samsung,pins = "gpa10-1"; + samsung,pin-function = <GS101_PIN_FUNC_EINT>; + samsung,pin-pud = <GS101_PIN_PULL_NONE>; + samsung,pin-drv = <GS101_PIN_DRV_2_5_MA>; + }; +}; + +&serial_0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&uart0_bus>; +}; + +&usi_uart { + status = "okay"; + samsung,clkreq-on; /* needed for UART mode */ +}; + +&watchdog_cl0 { + timeout-sec = <30>; + status = "okay"; +}; -- 2.43.0.472.g3155946c3a-goog