Hi Krzysztof,
On Thu, 12 Oct 2023 at 07:40, Krzysztof Kozlowski
<krzysztof.kozlowski@xxxxxxxxxx> wrote:
>
> On 11/10/2023 20:48, Peter Griffin wrote:
>
> ...
>
> > diff --git a/arch/arm64/boot/dts/google/gs101.dtsi b/arch/arm64/boot/dts/google/gs101.dtsi
> > new file mode 100644
> > index 000000000000..37fb0a4dc8d3
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/google/gs101.dtsi
> > @@ -0,0 +1,504 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * GS101 SoC
> > + *
> > + * Copyright 2019-2023 Google LLC
> > + *
> > + */
> > +
> > +#include <dt-bindings/clock/google,gs101.h>
> > +#include <dt-bindings/gpio/gpio.h>
> > +#include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +/ {
> > + compatible = "google,gs101";
> > + #address-cells = <2>;
> > + #size-cells = <1>;
> > +
> > + interrupt-parent = <&gic>;
> > +
> > + aliases {
> > + pinctrl0 = &pinctrl_0;
> > + pinctrl1 = &pinctrl_1;
> > + pinctrl2 = &pinctrl_2;
> > + pinctrl3 = &pinctrl_3;
> > + pinctrl4 = &pinctrl_4;
> > + pinctrl5 = &pinctrl_5;
> > + pinctrl6 = &pinctrl_6;
> > + pinctrl7 = &pinctrl_7;
> > + serial0 = &serial_0;
> > + };
> > +
> > + arm-pmu {
>
> pmu-0
will fix
>
> > + compatible = "arm,armv8-pmuv3";
> > + interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
> > + };
> > +
> > + dsu-pmu-0 {
>
> pmu-1
will fix
>
>
> > + compatible = "arm,dsu-pmu";
> > + interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
> > + cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
> > + <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
> > + };
> > +
> > + /* TODO replace with CCF clock */
> > + dummy_clk: oscillator {
> > + compatible = "fixed-clock";
> > + #clock-cells = <0>;
> > + clock-frequency = <12345>;
> > + clock-output-names = "pclk";
> > + };
> > +
> > + cpus {
> > + #address-cells = <2>;
> > + #size-cells = <0>;
> > +
> > + cpu-map {
> > + cluster0 {
> > + core0 {
> > + cpu = <&cpu0>;
> > + };
> > + core1 {
> > + cpu = <&cpu1>;
> > + };
> > + core2 {
> > + cpu = <&cpu2>;
> > + };
> > + core3 {
> > + cpu = <&cpu3>;
> > + };
> > + };
> > +
> > + cluster1 {
> > + core0 {
> > + cpu = <&cpu4>;
> > + };
> > + core1 {
> > + cpu = <&cpu5>;
> > + };
> > + };
> > +
> > + cluster2 {
> > + core0 {
> > + cpu = <&cpu6>;
> > + };
> > + core1 {
> > + cpu = <&cpu7>;
> > + };
> > + };
> > + };
> > +
> > + cpu0: cpu@0 {
> > + device_type = "cpu";
> > + compatible = "arm,armv8";
> > + reg = <0x0 0x0000>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&ANANKE_CPU_SLEEP>;
> > + capacity-dmips-mhz = <250>;
> > + dynamic-power-coefficient = <70>;
> > + };
> > +
> > + cpu1: cpu@100 {
> > + device_type = "cpu";
> > + compatible = "arm,armv8";
> > + reg = <0x0 0x0100>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&ANANKE_CPU_SLEEP>;
> > + capacity-dmips-mhz = <250>;
> > + dynamic-power-coefficient = <70>;
> > + };
> > +
> > + cpu2: cpu@200 {
> > + device_type = "cpu";
> > + compatible = "arm,armv8";
> > + reg = <0x0 0x0200>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&ANANKE_CPU_SLEEP>;
> > + capacity-dmips-mhz = <250>;
> > + dynamic-power-coefficient = <70>;
> > + };
> > +
> > + cpu3: cpu@300 {
> > + device_type = "cpu";
> > + compatible = "arm,armv8";
> > + reg = <0x0 0x0300>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&ANANKE_CPU_SLEEP>;
> > + capacity-dmips-mhz = <250>;
> > + dynamic-power-coefficient = <70>;
> > + };
> > +
> > + cpu4: cpu@400 {
> > + device_type = "cpu";
> > + compatible = "arm,armv8";
> > + reg = <0x0 0x0400>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&ENYO_CPU_SLEEP>;
> > + capacity-dmips-mhz = <620>;
> > + dynamic-power-coefficient = <284>;
> > + };
> > +
> > + cpu5: cpu@500 {
> > + device_type = "cpu";
> > + compatible = "arm,armv8";
> > + reg = <0x0 0x0500>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&ENYO_CPU_SLEEP>;
> > + capacity-dmips-mhz = <620>;
> > + dynamic-power-coefficient = <284>;
> > + };
> > +
> > + cpu6: cpu@600 {
> > + device_type = "cpu";
> > + compatible = "arm,armv8";
> > + reg = <0x0 0x0600>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&HERA_CPU_SLEEP>;
> > + capacity-dmips-mhz = <1024>;
> > + dynamic-power-coefficient = <650>;
> > + };
> > +
> > + cpu7: cpu@700 {
> > + device_type = "cpu";
> > + compatible = "arm,armv8";
> > + reg = <0x0 0x0700>;
> > + enable-method = "psci";
> > + cpu-idle-states = <&HERA_CPU_SLEEP>;
> > + capacity-dmips-mhz = <1024>;
> > + dynamic-power-coefficient = <650>;
> > + };
> > +
> > + idle-states {
> > + entry-method = "psci";
> > +
> > + ANANKE_CPU_SLEEP: cpu-ananke-sleep {
> > + idle-state-name = "c2";
> > + compatible = "arm,idle-state";
> > + arm,psci-suspend-param = <0x0010000>;
> > + entry-latency-us = <70>;
> > + exit-latency-us = <160>;
> > + min-residency-us = <2000>;
> > + };
> > +
> > + ENYO_CPU_SLEEP: cpu-enyo-sleep {
> > + idle-state-name = "c2";
> > + compatible = "arm,idle-state";
> > + arm,psci-suspend-param = <0x0010000>;
> > + entry-latency-us = <150>;
> > + exit-latency-us = <190>;
> > + min-residency-us = <2500>;
> > + };
> > +
> > + HERA_CPU_SLEEP: cpu-hera-sleep {
> > + idle-state-name = "c2";
> > + compatible = "arm,idle-state";
> > + arm,psci-suspend-param = <0x0010000>;
> > + entry-latency-us = <235>;
> > + exit-latency-us = <220>;
> > + min-residency-us = <3500>;
> > + };
> > + };
> > + };
> > +
> > + /* bootloader requires ect node */
> > + ect {
>
> This needs bindings.
I experimented a bit more and the minimum I need is an empty dt node
called ect, otherwise the bootloader will boot loop and we can't boot
the kernel
[ 2.977870] [E] [BOOT] fdt /ect path not found -1
Apart from a comment indicating that the bootloader requires this
empty ect dt node, what other bindings documentation would you like to
see? Something in google.yaml?
>
> > + parameter_address = <0x90000000>;
>
> No underscores in property names. Use hyphen.
>
> > + parameter_size = <0x53000>;
>
> No underscores.
Fortunately I can remove parameter_address and parameter_size and
still boot, so I will remove these in the next version.
Thanks,
Peter.
