Hello Mark, On 23. 4. 4. 21:58, Mark Brown wrote: > On Tue, Apr 04, 2023 at 03:00:11PM +0900, Jaewon Kim wrote: > >> This patch adds IRQ based PIO mode instead of cpu polling. >> By using the FIFO trigger level, interrupts are received. >> CPU consumption is reduced in PIO mode because registers are not >> constantly checked. > Is there some lower limit where it's still worth using polling, for > example for just one or two bytes like a register address? Taking an > interrupt isn't free... I did not considers lower limit. According to your review, interrupt seems to be called too often. However, It can't prevent the CPU utilization going to 100% during spi transmission. We will give more consideration and deliver a better solution to the next patch version. Thanks Jaewon Kim
